Subzero. WASM. Additional progress.

src/IceInst.cpp

 //===- subzero/src/IceInst.cpp - High-level instruction implementation ----===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 93 matching lines @@
     X(Select, "select");
     X(Store, "store");
     X(Switch, "switch");
     X(Assign, "assign");
     X(BundleLock, "bundlelock");
     X(BundleUnlock, "bundleunlock");
     X(FakeDef, "fakedef");
     X(FakeUse, "fakeuse");
     X(FakeKill, "fakekill");
     X(JumpTable, "jumptable");
+    X(Breakpoint, "break");

[Jim Stichnoth, 2016/04/14 20:03:44]

sort

[Eric Holk, 2016/04/15 15:24:26]

Done.

 #undef X
   default:
     assert(Kind >= Target);
     return "target";
   }
 }
 
 // Assign the instruction a new number.
 void Inst::renumber(Cfg *Func) {
   Number = isDeleted() ? NumberDeleted : Func->newInstNumber();
@@ skipping 385 matching lines @@
 
 void InstSwitch::addBranch(SizeT CaseIndex, uint64_t Value, CfgNode *Label) {
   assert(CaseIndex < NumCases);
   Values[CaseIndex] = Value;
   Labels[CaseIndex] = Label;
 }
 
 NodeList InstSwitch::getTerminatorEdges() const {
   NodeList OutEdges;
   OutEdges.reserve(NumCases + 1);
+  assert(LabelDefault);
   OutEdges.push_back(LabelDefault);
   for (SizeT I = 0; I < NumCases; ++I) {
+    assert(Labels[I]);
     OutEdges.push_back(Labels[I]);
   }
   std::sort(OutEdges.begin(), OutEdges.end(),
             [](const CfgNode *x, const CfgNode *y) {
               return x->getIndex() < y->getIndex();
             });
   auto Last = std::unique(OutEdges.begin(), OutEdges.end());
   OutEdges.erase(Last, OutEdges.end());
   return OutEdges;
 }
@@ skipping 509 matching lines @@
 }
 
 void InstTarget::dump(const Cfg *Func) const {
   if (!BuildDefs::dump())
     return;
   Ostream &Str = Func->getContext()->getStrDump();
   Str << "[TARGET] ";
   Inst::dump(Func);
 }
 
+InstBreakpoint::InstBreakpoint(Cfg *Func)
+    : InstHighLevel(Func, Inst::Breakpoint, 0, nullptr) {}
+
 bool checkForRedundantAssign(const Variable *Dest, const Operand *Source) {
   const auto *SrcVar = llvm::dyn_cast<const Variable>(Source);
   if (!SrcVar)
     return false;
   if (Dest->hasReg() && Dest->getRegNum() == SrcVar->getRegNum()) {
     // TODO: On x86-64, instructions like "mov eax, eax" are used to clear the
     // upper 32 bits of rax. We need to recognize and preserve these.
     return true;
   }
   if (!Dest->hasReg() && !SrcVar->hasReg() &&
       Dest->getStackOffset() == SrcVar->getStackOffset())
     return true;
   return false;
 }
 
 } // end of namespace Ice