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Issue 18712002: Convert UnaryOpStub to a HydrogenCodeStub (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: address review Created 7 years, 5 months ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
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2029 __ add(Operand(esp), Immediate(kDoubleSize)); 2029 __ add(Operand(esp), Immediate(kDoubleSize));
2030 break; 2030 break;
2031 } 2031 }
2032 default: 2032 default:
2033 UNREACHABLE(); 2033 UNREACHABLE();
2034 break; 2034 break;
2035 } 2035 }
2036 } 2036 }
2037 2037
2038 2038
2039 void LCodeGen::DoNegateNoSSE2D(LNegateNoSSE2D* instr) {
2040 __ push(Immediate(-1));
2041 __ fild_s(Operand(esp, 0));
2042 __ add(esp, Immediate(kPointerSize));
2043 __ fmulp();
2044 CurrentInstructionReturnsX87Result();
2045 }
2046
2047
2048
2039 void LCodeGen::DoArithmeticT(LArithmeticT* instr) { 2049 void LCodeGen::DoArithmeticT(LArithmeticT* instr) {
2040 ASSERT(ToRegister(instr->context()).is(esi)); 2050 ASSERT(ToRegister(instr->context()).is(esi));
2041 ASSERT(ToRegister(instr->left()).is(edx)); 2051 ASSERT(ToRegister(instr->left()).is(edx));
2042 ASSERT(ToRegister(instr->right()).is(eax)); 2052 ASSERT(ToRegister(instr->right()).is(eax));
2043 ASSERT(ToRegister(instr->result()).is(eax)); 2053 ASSERT(ToRegister(instr->result()).is(eax));
2044 2054
2045 BinaryOpStub stub(instr->op(), NO_OVERWRITE); 2055 BinaryOpStub stub(instr->op(), NO_OVERWRITE);
2046 CallCode(stub.GetCode(isolate()), RelocInfo::CODE_TARGET, instr); 2056 CallCode(stub.GetCode(isolate()), RelocInfo::CODE_TARGET, instr);
2047 __ nop(); // Signals no inlined code. 2057 __ nop(); // Signals no inlined code.
2048 } 2058 }
2049 2059
2050 2060
2051 int LCodeGen::GetNextEmittedBlock() const { 2061 int LCodeGen::GetNextEmittedBlock() const {
2052 for (int i = current_block_ + 1; i < graph()->blocks()->length(); ++i) { 2062 for (int i = current_block_ + 1; i < graph()->blocks()->length(); ++i) {
2053 if (!chunk_->GetLabel(i)->HasReplacement()) return i; 2063 if (!chunk_->GetLabel(i)->HasReplacement()) return i;
2054 } 2064 }
2055 return -1; 2065 return -1;
2056 } 2066 }
2057 2067
2058 2068
2059 template<class InstrType> 2069 template<class InstrType>
2060 void LCodeGen::EmitBranch(InstrType instr, Condition cc) { 2070 void LCodeGen::EmitBranch(InstrType instr, Condition cc) {
2071 int left_block = instr->TrueDestination(chunk_);
2061 int right_block = instr->FalseDestination(chunk_); 2072 int right_block = instr->FalseDestination(chunk_);
2062 int left_block = instr->TrueDestination(chunk_);
2063 2073
2064 int next_block = GetNextEmittedBlock(); 2074 int next_block = GetNextEmittedBlock();
2065 2075
2066 if (right_block == left_block) { 2076 if (right_block == left_block || cc == no_condition) {
2067 EmitGoto(left_block); 2077 EmitGoto(left_block);
2068 } else if (left_block == next_block) { 2078 } else if (left_block == next_block) {
2069 __ j(NegateCondition(cc), chunk_->GetAssemblyLabel(right_block)); 2079 __ j(NegateCondition(cc), chunk_->GetAssemblyLabel(right_block));
2070 } else if (right_block == next_block) { 2080 } else if (right_block == next_block) {
2071 __ j(cc, chunk_->GetAssemblyLabel(left_block)); 2081 __ j(cc, chunk_->GetAssemblyLabel(left_block));
2072 } else { 2082 } else {
2073 __ j(cc, chunk_->GetAssemblyLabel(left_block)); 2083 __ j(cc, chunk_->GetAssemblyLabel(left_block));
2074 __ jmp(chunk_->GetAssemblyLabel(right_block)); 2084 __ jmp(chunk_->GetAssemblyLabel(right_block));
2075 } 2085 }
2076 } 2086 }
2077 2087
2078 2088
2089 void LCodeGen::DoIsNumberAndBranch(LIsNumberAndBranch* instr) {
2090 Representation r = instr->hydrogen()->value()->representation();
2091 if (r.IsSmiOrInteger32() || r.IsDouble()) {
2092 EmitBranch(instr, no_condition);
2093 } else {
2094 ASSERT(r.IsTagged());
2095 Register reg = ToRegister(instr->value());
2096 HType type = instr->hydrogen()->value()->type();
2097 if (type.IsTaggedNumber()) {
2098 EmitBranch(instr, no_condition);
2099 }
2100 __ JumpIfSmi(reg, instr->TrueLabel(chunk_));
2101 __ cmp(FieldOperand(reg, HeapObject::kMapOffset),
2102 factory()->heap_number_map());
2103 EmitBranch(instr, equal);
2104 }
2105 }
2106
2107
2079 void LCodeGen::DoBranch(LBranch* instr) { 2108 void LCodeGen::DoBranch(LBranch* instr) {
2080 Representation r = instr->hydrogen()->value()->representation(); 2109 Representation r = instr->hydrogen()->value()->representation();
2081 if (r.IsSmiOrInteger32()) { 2110 if (r.IsSmiOrInteger32()) {
2082 ASSERT(!info()->IsStub()); 2111 ASSERT(!info()->IsStub());
2083 Register reg = ToRegister(instr->value()); 2112 Register reg = ToRegister(instr->value());
2084 __ test(reg, Operand(reg)); 2113 __ test(reg, Operand(reg));
2085 EmitBranch(instr, not_zero); 2114 EmitBranch(instr, not_zero);
2086 } else if (r.IsDouble()) { 2115 } else if (r.IsDouble()) {
2087 ASSERT(!info()->IsStub()); 2116 ASSERT(!info()->IsStub());
2088 CpuFeatureScope scope(masm(), SSE2); 2117 CpuFeatureScope scope(masm(), SSE2);
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6543 FixedArray::kHeaderSize - kPointerSize)); 6572 FixedArray::kHeaderSize - kPointerSize));
6544 __ bind(&done); 6573 __ bind(&done);
6545 } 6574 }
6546 6575
6547 6576
6548 #undef __ 6577 #undef __
6549 6578
6550 } } // namespace v8::internal 6579 } } // namespace v8::internal
6551 6580
6552 #endif // V8_TARGET_ARCH_IA32 6581 #endif // V8_TARGET_ARCH_IA32
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