Begins implementation of ARM neon instructions.

runtime/vm/intermediate_language_arm.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"  // Needed here to get TARGET_ARCH_ARM.
 #if defined(TARGET_ARCH_ARM)
 
 #include "vm/intermediate_language.h"
 
 #include "lib/error.h"
@@ skipping 710 matching lines @@
       UNREACHABLE();
       return VS;
   }
 }
 
 
 static void EmitDoubleComparisonOp(FlowGraphCompiler* compiler,
                                    const LocationSummary& locs,
                                    Token::Kind kind,
                                    BranchInstr* branch) {
-  DRegister left = locs.in(0).fpu_reg();
-  DRegister right = locs.in(1).fpu_reg();
+  QRegister left = locs.in(0).fpu_reg();
+  QRegister right = locs.in(1).fpu_reg();
 
   Condition true_condition = TokenKindToDoubleCondition(kind);
   if (branch != NULL) {
     compiler->EmitDoubleCompareBranch(
         true_condition, left, right, branch);
   } else {
     compiler->EmitDoubleCompareBool(
         true_condition, left, right, locs.out().reg());
   }
 }
@@ skipping 453 matching lines @@
   if (!IsExternal()) {
     ASSERT(this->array()->definition()->representation() == kTagged);
     __ AddImmediate(index.reg(),
         FlowGraphCompiler::DataOffsetFor(class_id()) - kHeapObjectTag);
   }
   element_address = Address(array, index.reg(), LSL, 0);
 
   if ((representation() == kUnboxedDouble) ||
       (representation() == kUnboxedMint) ||
       (representation() == kUnboxedFloat32x4)) {
-    DRegister result = locs()->out().fpu_reg();
+    DRegister result = EvenDRegisterOf(locs()->out().fpu_reg());
     switch (class_id()) {
       case kTypedDataInt32ArrayCid:
         UNIMPLEMENTED();
         break;
       case kTypedDataUint32ArrayCid:
         UNIMPLEMENTED();
         break;
       case kTypedDataFloat32ArrayCid:
         // Load single precision float and promote to double.
         // vldrs does not support indexed addressing.
@@ skipping 246 matching lines @@
       if (value()->IsSmiValue()) {
         ASSERT(RequiredInputRepresentation(2) == kTagged);
         Register value = locs()->in(2).reg();
         __ SmiUntag(value);
         __ str(value, element_address);
       } else {
         UNIMPLEMENTED();
       }
       break;
     }
-    case kTypedDataFloat32ArrayCid:
+    case kTypedDataFloat32ArrayCid: {
+      DRegister in2 = EvenDRegisterOf(locs()->in(2).fpu_reg());
       // Convert to single precision.
-      __ vcvtsd(STMP, locs()->in(2).fpu_reg());
+      __ vcvtsd(STMP, in2);
       // Store.
       __ add(index.reg(), index.reg(), ShifterOperand(array));
       __ StoreSToOffset(STMP, index.reg(), 0);
       break;
-    case kTypedDataFloat64ArrayCid:
+    }
+    case kTypedDataFloat64ArrayCid: {
+      DRegister in2 = EvenDRegisterOf(locs()->in(2).fpu_reg());
       __ add(index.reg(), index.reg(), ShifterOperand(array));
-      __ StoreDToOffset(locs()->in(2).fpu_reg(), index.reg(), 0);
+      __ StoreDToOffset(in2, index.reg(), 0);
       break;
+    }
     case kTypedDataFloat32x4ArrayCid:
       UNIMPLEMENTED();
       break;
     default:
       UNREACHABLE();
   }
 }
 
 
 LocationSummary* GuardFieldInstr::MakeLocationSummary() const {
@@ skipping 964 matching lines @@
     case Token::kBIT_XOR: {
       // No overflow check.
       __ eor(result, left, ShifterOperand(right));
       break;
     }
     case Token::kTRUNCDIV: {
       // Handle divide by zero in runtime.
       __ cmp(right, ShifterOperand(0));
       __ b(deopt, EQ);
       Register temp = locs()->temp(0).reg();
-      DRegister dtemp = locs()->temp(1).fpu_reg();
+      DRegister dtemp = EvenDRegisterOf(locs()->temp(1).fpu_reg());
       __ Asr(temp, left, kSmiTagSize);  // SmiUntag left into temp.
       __ Asr(IP, right, kSmiTagSize);  // SmiUntag right into IP.
 
       __ IntegerDivide(result, temp, IP, dtemp, DTMP);
 
       // Check the corner case of dividing the 'MIN_SMI' with -1, in which
       // case we cannot tag the result.
       __ CompareImmediate(result, 0x40000000);
       __ b(deopt, EQ);
       __ SmiTag(result);
@@ skipping 118 matching lines @@
 
  private:
   BoxDoubleInstr* instruction_;
 };
 
 
 void BoxDoubleInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
   BoxDoubleSlowPath* slow_path = new BoxDoubleSlowPath(this);
   compiler->AddSlowPathCode(slow_path);
 
-  Register out_reg = locs()->out().reg();
-  DRegister value = locs()->in(0).fpu_reg();
+  const Register out_reg = locs()->out().reg();
+  const DRegister value = EvenDRegisterOf(locs()->in(0).fpu_reg());
 
   __ TryAllocate(compiler->double_class(),
                  slow_path->entry_label(),
                  out_reg);
   __ Bind(slow_path->exit_label());
   __ StoreDToOffset(value, out_reg, Double::value_offset() - kHeapObjectTag);
 }
 
 
 LocationSummary* UnboxDoubleInstr::MakeLocationSummary() const {
   const intptr_t kNumInputs = 1;
   const intptr_t value_cid = value()->Type()->ToCid();
   const bool needs_temp = ((value_cid != kSmiCid) && (value_cid != kDoubleCid));
   const bool needs_writable_input = (value_cid == kSmiCid);
   const intptr_t kNumTemps = needs_temp ? 1 : 0;
   LocationSummary* summary =
       new LocationSummary(kNumInputs, kNumTemps, LocationSummary::kNoCall);
   summary->set_in(0, needs_writable_input
                      ? Location::WritableRegister()
                      : Location::RequiresRegister());
   if (needs_temp) summary->set_temp(0, Location::RequiresRegister());
   summary->set_out(Location::RequiresFpuRegister());
   return summary;
 }
 
 
 void UnboxDoubleInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
   const intptr_t value_cid = value()->Type()->ToCid();
   const Register value = locs()->in(0).reg();
-  const DRegister result = locs()->out().fpu_reg();
+  const DRegister result = EvenDRegisterOf(locs()->out().fpu_reg());
 
   if (value_cid == kDoubleCid) {
     __ LoadDFromOffset(result, value, Double::value_offset() - kHeapObjectTag);
   } else if (value_cid == kSmiCid) {
     __ SmiUntag(value);  // Untag input before conversion.
     __ vmovsr(STMP, value);
     __ vcvtdi(result, STMP);
   } else {
     Label* deopt = compiler->AddDeoptStub(deopt_id_, kDeoptBinaryDoubleOp);
     Register temp = locs()->temp(0).reg();
@@ skipping 64 matching lines @@
   LocationSummary* summary =
       new LocationSummary(kNumInputs, kNumTemps, LocationSummary::kNoCall);
   summary->set_in(0, Location::RequiresFpuRegister());
   summary->set_in(1, Location::RequiresFpuRegister());
   summary->set_out(Location::RequiresFpuRegister());
   return summary;
 }
 
 
 void BinaryDoubleOpInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
-  DRegister left = locs()->in(0).fpu_reg();
-  DRegister right = locs()->in(1).fpu_reg();
-  DRegister result = locs()->out().fpu_reg();
+  DRegister left = EvenDRegisterOf(locs()->in(0).fpu_reg());
+  DRegister right = EvenDRegisterOf(locs()->in(1).fpu_reg());
+  DRegister result = EvenDRegisterOf(locs()->out().fpu_reg());
   switch (op_kind()) {
     case Token::kADD: __ vaddd(result, left, right); break;
     case Token::kSUB: __ vsubd(result, left, right); break;
     case Token::kMUL: __ vmuld(result, left, right); break;
     case Token::kDIV: __ vdivd(result, left, right); break;
     default: UNREACHABLE();
   }
 }
 
 
@@ skipping 210 matching lines @@
   const intptr_t kNumTemps = 0;
   LocationSummary* summary =
       new LocationSummary(kNumInputs, kNumTemps, LocationSummary::kNoCall);
   summary->set_in(0, Location::RequiresFpuRegister());
   summary->set_out(Location::RequiresFpuRegister());
   return summary;
 }
 
 
 void MathSqrtInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
-  __ vsqrtd(locs()->out().fpu_reg(), locs()->in(0).fpu_reg());
+  DRegister val = EvenDRegisterOf(locs()->in(0).fpu_reg());
+  DRegister result = EvenDRegisterOf(locs()->out().fpu_reg());
+  __ vsqrtd(result, val);
 }
 
 
 LocationSummary* UnarySmiOpInstr::MakeLocationSummary() const {
   const intptr_t kNumInputs = 1;
   const intptr_t kNumTemps = 0;
   LocationSummary* summary =
       new LocationSummary(kNumInputs, kNumTemps, LocationSummary::kNoCall);
   summary->set_in(0, Location::RequiresRegister());
   // We make use of 3-operand instructions by not requiring result register
@@ skipping 31 matching lines @@
   LocationSummary* result =
       new LocationSummary(kNumInputs, kNumTemps, LocationSummary::kNoCall);
   result->set_in(0, Location::WritableRegister());
   result->set_out(Location::RequiresFpuRegister());
   return result;
 }
 
 
 void SmiToDoubleInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
   Register value = locs()->in(0).reg();
-  FpuRegister result = locs()->out().fpu_reg();
+  DRegister result = EvenDRegisterOf(locs()->out().fpu_reg());
   __ SmiUntag(value);
   __ vmovsr(STMP, value);
   __ vcvtdi(result, STMP);
 }
 
 
 LocationSummary* DoubleToIntegerInstr::MakeLocationSummary() const {
   const intptr_t kNumInputs = 1;
   const intptr_t kNumTemps = 0;
   LocationSummary* result =
@@ skipping 52 matching lines @@
       kNumInputs, kNumTemps, LocationSummary::kNoCall);
   result->set_in(0, Location::RequiresFpuRegister());
   result->set_out(Location::RequiresRegister());
   return result;
 }
 
 
 void DoubleToSmiInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
   Label* deopt = compiler->AddDeoptStub(deopt_id(), kDeoptDoubleToSmi);
   Register result = locs()->out().reg();
-  DRegister value = locs()->in(0).fpu_reg();
+  DRegister value = EvenDRegisterOf(locs()->in(0).fpu_reg());
   // First check for NaN. Checking for minint after the conversion doesn't work
   // on ARM because vcvtid gives 0 for NaN.
   __ vcmpd(value, value);
   __ vmstat();
   __ b(deopt, VS);
 
   __ vcvtid(STMP, value);
   __ vmovrs(result, STMP);
   // Check for overflow and that it fits into Smi.
   __ CompareImmediate(result, 0xC0000000);
   __ b(deopt, MI);
   __ SmiTag(result);
 }
 
 
 LocationSummary* DoubleToDoubleInstr::MakeLocationSummary() const {
   const intptr_t kNumInputs = 1;
   const intptr_t kNumTemps = 0;
   LocationSummary* result =
       new LocationSummary(kNumInputs, kNumTemps, LocationSummary::kNoCall);
   result->set_in(0, Location::RequiresFpuRegister());
   result->set_out(Location::RequiresFpuRegister());
   return result;
 }
 
 
 void DoubleToDoubleInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
-  // DRegister value = locs()->in(0).fpu_reg();
-  // DRegister result = locs()->out().fpu_reg();
+  // QRegister value = locs()->in(0).fpu_reg();
+  // QRegister result = locs()->out().fpu_reg();

[regis, 2013/07/16 00:18:42]

Why are those lines commented out?

   switch (recognized_kind()) {
     case MethodRecognizer::kDoubleTruncate:
       UNIMPLEMENTED();
       // __ roundsd(result, value,  Assembler::kRoundToZero);
       break;
     case MethodRecognizer::kDoubleFloor:
       UNIMPLEMENTED();
       // __ roundsd(result, value,  Assembler::kRoundDown);
       break;
     case MethodRecognizer::kDoubleCeil:
       UNIMPLEMENTED();
       // __ roundsd(result, value,  Assembler::kRoundUp);
       break;
     default:
       UNREACHABLE();
   }
 }
 
 
 LocationSummary* InvokeMathCFunctionInstr::MakeLocationSummary() const {
   ASSERT((InputCount() == 1) || (InputCount() == 2));
   const intptr_t kNumTemps = 0;
   LocationSummary* result =
       new LocationSummary(InputCount(), kNumTemps, LocationSummary::kCall);
-  result->set_in(0, Location::FpuRegisterLocation(D0));
+  result->set_in(0, Location::FpuRegisterLocation(Q0));
   if (InputCount() == 2) {
-    result->set_in(1, Location::FpuRegisterLocation(D1));
+    result->set_in(1, Location::FpuRegisterLocation(Q1));
   }
-  result->set_out(Location::FpuRegisterLocation(D0));
+  result->set_out(Location::FpuRegisterLocation(Q0));
   return result;
 }
 
 
 void InvokeMathCFunctionInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
   // For pow-function return NAN if exponent is NAN.
   Label do_call, skip_call;
   if (recognized_kind() == MethodRecognizer::kDoublePow) {
-    DRegister exp = locs()->in(1).fpu_reg();
+    DRegister exp = EvenDRegisterOf(locs()->in(1).fpu_reg());
+    DRegister result = EvenDRegisterOf(locs()->out().fpu_reg());
     __ vcmpd(exp, exp);
     __ vmstat();
     __ b(&do_call, VC);  // NaN -> false;
     // Exponent is NaN, return NaN.
-    __ vmovd(locs()->out().fpu_reg(), exp);
+    __ vmovd(result, exp);
     __ b(&skip_call);
   }
   __ Bind(&do_call);
   // We currently use 'hardfp' ('gnueabihf') rather than 'softfp'
   // ('gnueabi') float ABI for leaf runtime calls, i.e. double values
   // are passed and returned in vfp registers rather than in integer
   // register pairs.
+  if (InputCount() == 2) {
+    // Args must be in D0 and D1, so move arg from Q1(== D3:D2) to D1.
+    __ vmovd(D1, D2);
+  }
   __ CallRuntime(TargetFunction());
   __ Bind(&skip_call);
 }
 
 
 LocationSummary* PolymorphicInstanceCallInstr::MakeLocationSummary() const {
   return MakeCallSummary();
 }
 
 
@@ skipping 491 matching lines @@
   compiler->GenerateCall(token_pos(),
                          &label,
                          PcDescriptors::kOther,
                          locs());
   __ Drop(2);  // Discard type arguments and receiver.
 }
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_ARM