MIPS: Enable big endian testing.

test/cctest/test-assembler-mips64.cc

 // Copyright 2012 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
 //       disclaimer in the documentation and/or other materials provided
@@ skipping 1374 matching lines @@
   Isolate* isolate = CcTest::i_isolate();
   HandleScope scope(isolate);
 
   typedef struct {
     int64_t r1;
     int64_t r2;
     int64_t r3;
     int64_t r4;
     int64_t r5;
     int64_t r6;
+    int64_t r7;
+    int64_t r8;
+    int64_t r9;
+    int64_t r10;
+    int64_t r11;
+    int64_t r12;
     uint32_t ui;
     int32_t si;
   } T;
   T t;

[balazs.kilvady, 2016/04/06 10:36:22]

In C++ no need for typedef for structs, enums. Here you can use struct T {}; T
t; Or even struct T {} t; I guess.

[Ilija.Pavlovic1, 2016/04/06 14:52:47]

Done.

 
   Assembler assm(isolate, NULL, 0);
   Label L, C;
 
   // Basic 32-bit word load/store, with un-signed data.
   __ lw(a4, MemOperand(a0, offsetof(T, ui)));
   __ sw(a4, MemOperand(a0, offsetof(T, r1)));
 
   // Check that the data got zero-extended into 64-bit a4.
   __ sd(a4, MemOperand(a0, offsetof(T, r2)));
 
   // Basic 32-bit word load/store, with SIGNED data.
   __ lw(a5, MemOperand(a0, offsetof(T, si)));
   __ sw(a5, MemOperand(a0, offsetof(T, r3)));
 
   // Check that the data got sign-extended into 64-bit a4.
   __ sd(a5, MemOperand(a0, offsetof(T, r4)));
 
   // 32-bit UNSIGNED word load/store, with SIGNED data.
   __ lwu(a6, MemOperand(a0, offsetof(T, si)));
   __ sw(a6, MemOperand(a0, offsetof(T, r5)));
 
   // Check that the data got zero-extended into 64-bit a4.
   __ sd(a6, MemOperand(a0, offsetof(T, r6)));
 
   // lh with positive data.
   __ lh(a5, MemOperand(a0, offsetof(T, ui)));
-  __ sw(a5, MemOperand(a0, offsetof(T, r2)));
+  __ sw(a5, MemOperand(a0, offsetof(T, r7)));
 
   // lh with negative data.
   __ lh(a6, MemOperand(a0, offsetof(T, si)));
-  __ sw(a6, MemOperand(a0, offsetof(T, r3)));
+  __ sw(a6, MemOperand(a0, offsetof(T, r8)));
 
   // lhu with negative data.
   __ lhu(a7, MemOperand(a0, offsetof(T, si)));
-  __ sw(a7, MemOperand(a0, offsetof(T, r4)));
+  __ sw(a7, MemOperand(a0, offsetof(T, r9)));
 
   // lb with negative data.
   __ lb(t0, MemOperand(a0, offsetof(T, si)));
-  __ sw(t0, MemOperand(a0, offsetof(T, r5)));
+  __ sw(t0, MemOperand(a0, offsetof(T, r10)));
 
-  // // sh writes only 1/2 of word.
-  __ lui(t1, 0x3333);
-  __ ori(t1, t1, 0x3333);
-  __ sw(t1, MemOperand(a0, offsetof(T, r6)));
-  __ lhu(t1, MemOperand(a0, offsetof(T, si)));
-  __ sh(t1, MemOperand(a0, offsetof(T, r6)));
+  // sh writes only 1/2 of word.
+  __ lw(a4, MemOperand(a0, offsetof(T, ui)));
+  __ sh(a4, MemOperand(a0, offsetof(T, r11)));
+  __ lw(a4, MemOperand(a0, offsetof(T, si)));
+  __ sh(a4, MemOperand(a0, offsetof(T, r12)));
 
   __ jr(ra);
   __ nop();
 
   CodeDesc desc;
   assm.GetCode(&desc);
   Handle<Code> code = isolate->factory()->NewCode(
       desc, Code::ComputeFlags(Code::STUB), Handle<Code>());
   F3 f = FUNCTION_CAST<F3>(code->entry());
   t.ui = 0x44332211;
   t.si = 0x99aabbcc;
-  t.r1 = 0x1111111111111111;
-  t.r2 = 0x2222222222222222;
-  t.r3 = 0x3333333333333333;
-  t.r4 = 0x4444444444444444;
+  t.r1 = 0x5555555555555555;
+  t.r2 = 0x5555555555555555;
+  t.r3 = 0x5555555555555555;
+  t.r4 = 0x5555555555555555;
   t.r5 = 0x5555555555555555;
-  t.r6 = 0x6666666666666666;
+  t.r6 = 0x5555555555555555;
+  t.r7 = 0x5555555555555555;
+  t.r8 = 0x5555555555555555;
+  t.r9 = 0x5555555555555555;
+  t.r10 = 0x5555555555555555;
+  t.r11 = 0x5555555555555555;
+  t.r12 = 0x5555555555555555;
+
   Object* dummy = CALL_GENERATED_CODE(isolate, f, &t, 0, 0, 0, 0);
   USE(dummy);
 
-  // Unsigned data, 32 & 64.
-  CHECK_EQ(static_cast<int64_t>(0x1111111144332211L), t.r1);
-  CHECK_EQ(static_cast<int64_t>(0x0000000000002211L), t.r2);
+  if (kArchEndian == kLittle) {
+    // Unsigned data, 32 & 64
+    CHECK_EQ(static_cast<int64_t>(0x5555555544332211L), t.r1);  // lw, sw.
+    CHECK_EQ(static_cast<int64_t>(0x0000000044332211L), t.r2);  // sd.
 
-  // Signed data, 32 & 64.
-  CHECK_EQ(static_cast<int64_t>(0x33333333ffffbbccL), t.r3);
-  CHECK_EQ(static_cast<int64_t>(0xffffffff0000bbccL), t.r4);
+    // Signed data, 32 & 64.
+    CHECK_EQ(static_cast<int64_t>(0x5555555599aabbccL), t.r3);  // lw, sw.
+    CHECK_EQ(static_cast<int64_t>(0xffffffff99aabbccL), t.r4);  // sd.
 
-  // Signed data, 32 & 64.
-  CHECK_EQ(static_cast<int64_t>(0x55555555ffffffccL), t.r5);
-  CHECK_EQ(static_cast<int64_t>(0x000000003333bbccL), t.r6);
+    // Signed data, 32 & 64.
+    CHECK_EQ(static_cast<int64_t>(0x5555555599aabbccL), t.r5);  // lwu, sw.
+    CHECK_EQ(static_cast<int64_t>(0x0000000099aabbccL), t.r6);  // sd.
+
+    // lh with unsigned and signed data.
+    CHECK_EQ(static_cast<int64_t>(0x5555555500002211L), t.r7);  // lh, sw.
+    CHECK_EQ(static_cast<int64_t>(0x55555555ffffbbccL), t.r8);  // lh, sw.
+
+    // lhu with signed data.
+    CHECK_EQ(static_cast<int64_t>(0x555555550000bbccL), t.r9);  // lhu, sw.
+
+    // lb with signed data.
+    CHECK_EQ(static_cast<int64_t>(0x55555555ffffffccL), t.r10);  // lb, sw.
+
+    // sh with unsigned and signed data.
+    CHECK_EQ(static_cast<int64_t>(0x5555555555552211L), t.r11);  // lw, sh.
+    CHECK_EQ(static_cast<int64_t>(0x555555555555bbccL), t.r12);  // lw, sh.
+  } else {
+    // Unsigned data, 32 & 64
+    CHECK_EQ(static_cast<int64_t>(0x4433221155555555L), t.r1);  // lw, sw.
+    CHECK_EQ(static_cast<int64_t>(0x0000000044332211L), t.r2);  // sd.
+
+    // Signed data, 32 & 64.
+    CHECK_EQ(static_cast<int64_t>(0x99aabbcc55555555L), t.r3);  // lw, sw.
+    CHECK_EQ(static_cast<int64_t>(0xffffffff99aabbccL), t.r4);  // sd.
+
+    // Signed data, 32 & 64.
+    CHECK_EQ(static_cast<int64_t>(0x99aabbcc55555555L), t.r5);  // lwu, sw.
+    CHECK_EQ(static_cast<int64_t>(0x0000000099aabbccL), t.r6);  // sd.
+
+    // lh with unsigned and signed data.
+    CHECK_EQ(static_cast<int64_t>(0x0000443355555555L), t.r7);  // lh, sw.
+    CHECK_EQ(static_cast<int64_t>(0xffff99aa55555555L), t.r8);  // lh, sw.
+
+    // lhu with signed data.
+    CHECK_EQ(static_cast<int64_t>(0x000099aa55555555L), t.r9);  // lhu, sw.
+
+    // lb with signed data.
+    CHECK_EQ(static_cast<int64_t>(0xffffff9955555555L), t.r10);  // lb, sw.
+
+    // sh with unsigned and signed data.
+    CHECK_EQ(static_cast<int64_t>(0x2211555555555555L), t.r11);  // lw, sh.
+    CHECK_EQ(static_cast<int64_t>(0xbbcc555555555555L), t.r12);  // lw, sh.
+  }
 }
 
 
 // ----------------------mips64r6 specific tests----------------------
 TEST(seleqz_selnez) {
   if (kArchVariant == kMips64r6) {
     CcTest::InitializeVM();
     Isolate* isolate = CcTest::i_isolate();
     HandleScope scope(isolate);
     MacroAssembler assm(isolate, NULL, 0,
@@ skipping 668 matching lines @@
 
     float outputs_S[kTableLength] = {
       4.8, 4.8, -4.8, -0.29
     };
     double outputs_D[kTableLength] = {
       5.3, -5.3, 5.3, -2.9
     };
 
     __ ldc1(f2, MemOperand(a0, offsetof(TestFloat, a)) );
     __ lwc1(f6, MemOperand(a0, offsetof(TestFloat, c)) );
-    __ lw(t0, MemOperand(a0, offsetof(TestFloat, rt)) );
+    __ ld(t0, MemOperand(a0, offsetof(TestFloat, rt)));
     __ Move(f12, 0.0);
     __ Move(f10, 0.0);
     __ Move(f16, 0.0);
     __ Move(f14, 0.0);
     __ sdc1(f12, MemOperand(a0, offsetof(TestFloat, bold)) );
     __ swc1(f10, MemOperand(a0, offsetof(TestFloat, dold)) );
     __ sdc1(f16, MemOperand(a0, offsetof(TestFloat, bold1)) );
     __ swc1(f14, MemOperand(a0, offsetof(TestFloat, dold1)) );
     __ movz_s(f10, f6, t0);
     __ movz_d(f12, f2, t0);
@@ skipping 3375 matching lines @@
 
 
 TEST(r6_ldpc) {
   if (kArchVariant == kMips64r6) {
     CcTest::InitializeVM();
 
     struct TestCaseLdpc {
       int       offset;
       uint64_t  expected_res;
     };
 

[balazs.kilvady, 2016/04/06 10:36:22]

Nice solution. But if you have time, please try out the next modification:
use __ dq(int64_t) in run_ldpc() (which also could be a static function). I
guess in that case  TestCaseLdpc::expected_res stored in the used architecture's
native endianess format and ldpc() would read the double-words in the same
format. I hope we could avoid order-fix tricks (although I like lambdas :) ).

[Ilija.Pavlovic1, 2016/04/06 14:52:47]

Solution with __ dq(int64_t) is tested and it works for all offset values except
for offset = 0.

Here is one failed example for big endian (test data are adapted for little
endian):

res=0xef18000003001025 expected_res=0x3001025ef180000

For offset = 0 two words are taken: - one with addiu instruction and another
with ldpc instruction. Therefore for big and little endian we will have
different values.

[balazs.kilvady, 2016/04/06 17:43:13]

Yep, as ldpc emitted alone as a 32-bit value we loose the benefit of emitting
8-byte values in arch-dependen endianess way. We could use a dq(ldpc << 32 |
nop) but that is unreadble nasty hack. So lets use your first solution (till
there is no better idea :) ).

Also ldpc aligns pc to a 8-byte boundary:
GPR[rs]   memory[ (PC&~0x7) + sign_extend( offset << 3) ]
which could be ensured with __ Align(8);

[Ilija.Pavlovic1, 2016/04/07 10:59:24]

Acknowledged.

+    auto doubleword = [](uint32_t word2, uint32_t word1) {
+      if (kArchEndian == kLittle)
+        return (static_cast<uint64_t>(word2) << 32) + word1;
+      else
+        return (static_cast<uint64_t>(word1) << 32) + word2;
+    };
+
     struct TestCaseLdpc tc[] = {

[balazs.kilvady, 2016/04/06 10:36:22]

struct keyword is needless here.

[Ilija.Pavlovic1, 2016/04/06 14:52:47]

Done.

-      // offset,         expected_res
-      { -131072,         0x250ffffe250fffff },
-      {      -4,         0x250c0006250c0007 },
-      {      -1,         0x250c0000250c0001 },
-      {       0,         0x03001025ef180000 },
-      {       1,         0x2508000125080000 },
-      {       4,         0x2508000725080006 },
-      {  131071,         0x250bfffd250bfffc },
+        // offset,  expected_res
+        {-131072, doubleword(0x250ffffe, 0x250fffff)},
+        {-4, doubleword(0x250c0006, 0x250c0007)},
+        {-1, doubleword(0x250c0000, 0x250c0001)},
+        {0, doubleword(0x03001025, 0xef180000)},
+        {1, doubleword(0x25080001, 0x25080000)},
+        {4, doubleword(0x25080007, 0x25080006)},
+        {131071, doubleword(0x250bfffd, 0x250bfffc)},
     };
 
     size_t nr_test_cases = sizeof(tc) / sizeof(TestCaseLdpc);
     for (size_t i = 0; i < nr_test_cases; ++i) {
       uint64_t res = run_ldpc(tc[i].offset);
       CHECK_EQ(tc[i].expected_res, res);
     }
   }
 }
 
@@ skipping 285 matching lines @@
       desc, Code::ComputeFlags(Code::STUB), Handle<Code>());
   F2 f = FUNCTION_CAST<F2>(code->entry());
 
   int64_t res = reinterpret_cast<int64_t>(
       CALL_GENERATED_CODE(isolate, f, 42, 42, 0, 0, 0));
   CHECK_EQ(res, 0);
 }
 
 
 #undef __