Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(88)

Side by Side Diff: src/IceTargetLoweringMIPS32.cpp

Issue 1866463002: Subzero: Improve non-MINIMAL string performance. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Created 4 years, 8 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch
« no previous file with comments | « src/IceTargetLoweringARM32.cpp ('k') | src/IceTargetLoweringX86BaseImpl.h » ('j') | no next file with comments »
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
1 //===- subzero/src/IceTargetLoweringMIPS32.cpp - MIPS32 lowering ----------===// 1 //===- subzero/src/IceTargetLoweringMIPS32.cpp - MIPS32 lowering ----------===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 /// 9 ///
10 /// \file 10 /// \file
(...skipping 416 matching lines...) Expand 10 before | Expand all | Expand 10 after
427 } 427 }
428 // If this leaves us without room to consume another register, 428 // If this leaves us without room to consume another register,
429 // leave any previously speculatively consumed registers as consumed. 429 // leave any previously speculatively consumed registers as consumed.
430 if (NumGPRRegsUsed >= MIPS32_MAX_GPR_ARG) 430 if (NumGPRRegsUsed >= MIPS32_MAX_GPR_ARG)
431 continue; 431 continue;
432 // RegHi = RegNumT::fixme(RegMIPS32::Reg_A0 + NumGPRRegsUsed); 432 // RegHi = RegNumT::fixme(RegMIPS32::Reg_A0 + NumGPRRegsUsed);
433 ++NumGPRRegsUsed; 433 ++NumGPRRegsUsed;
434 Variable *RegisterArg = Func->makeVariable(Ty); 434 Variable *RegisterArg = Func->makeVariable(Ty);
435 auto *RegisterArg64On32 = llvm::cast<Variable64On32>(RegisterArg); 435 auto *RegisterArg64On32 = llvm::cast<Variable64On32>(RegisterArg);
436 if (BuildDefs::dump()) 436 if (BuildDefs::dump())
437 RegisterArg64On32->setName(Func, "home_reg:" + Arg->getName(Func)); 437 RegisterArg64On32->setName(Func, "home_reg:" + Arg->getName());
438 RegisterArg64On32->initHiLo(Func); 438 RegisterArg64On32->initHiLo(Func);
439 RegisterArg64On32->setIsArg(); 439 RegisterArg64On32->setIsArg();
440 RegisterArg64On32->getLo()->setRegNum(RegLo); 440 RegisterArg64On32->getLo()->setRegNum(RegLo);
441 RegisterArg64On32->getHi()->setRegNum(RegHi); 441 RegisterArg64On32->getHi()->setRegNum(RegHi);
442 Arg->setIsArg(false); 442 Arg->setIsArg(false);
443 Args[I] = RegisterArg64On32; 443 Args[I] = RegisterArg64On32;
444 Context.insert<InstAssign>(Arg, RegisterArg); 444 Context.insert<InstAssign>(Arg, RegisterArg);
445 continue; 445 continue;
446 } else { 446 } else {
447 assert(Ty == IceType_i32); 447 assert(Ty == IceType_i32);
448 if (NumGPRRegsUsed >= MIPS32_MAX_GPR_ARG) 448 if (NumGPRRegsUsed >= MIPS32_MAX_GPR_ARG)
449 continue; 449 continue;
450 const auto RegNum = RegNumT::fixme(RegMIPS32::Reg_A0 + NumGPRRegsUsed); 450 const auto RegNum = RegNumT::fixme(RegMIPS32::Reg_A0 + NumGPRRegsUsed);
451 ++NumGPRRegsUsed; 451 ++NumGPRRegsUsed;
452 Variable *RegisterArg = Func->makeVariable(Ty); 452 Variable *RegisterArg = Func->makeVariable(Ty);
453 if (BuildDefs::dump()) { 453 if (BuildDefs::dump()) {
454 RegisterArg->setName(Func, "home_reg:" + Arg->getName(Func)); 454 RegisterArg->setName(Func, "home_reg:" + Arg->getName());
455 } 455 }
456 RegisterArg->setRegNum(RegNum); 456 RegisterArg->setRegNum(RegNum);
457 RegisterArg->setIsArg(); 457 RegisterArg->setIsArg();
458 Arg->setIsArg(false); 458 Arg->setIsArg(false);
459 Args[I] = RegisterArg; 459 Args[I] = RegisterArg;
460 Context.insert<InstAssign>(Arg, RegisterArg); 460 Context.insert<InstAssign>(Arg, RegisterArg);
461 } 461 }
462 } 462 }
463 } 463 }
464 464
(...skipping 853 matching lines...) Expand 10 before | Expand all | Expand 10 after
1318 Str << "\t.set\t" 1318 Str << "\t.set\t"
1319 << "nomips16\n"; 1319 << "nomips16\n";
1320 } 1320 }
1321 1321
1322 SmallBitVector TargetMIPS32::TypeToRegisterSet[RCMIPS32_NUM]; 1322 SmallBitVector TargetMIPS32::TypeToRegisterSet[RCMIPS32_NUM];
1323 SmallBitVector TargetMIPS32::TypeToRegisterSetUnfiltered[RCMIPS32_NUM]; 1323 SmallBitVector TargetMIPS32::TypeToRegisterSetUnfiltered[RCMIPS32_NUM];
1324 SmallBitVector TargetMIPS32::RegisterAliases[RegMIPS32::Reg_NUM]; 1324 SmallBitVector TargetMIPS32::RegisterAliases[RegMIPS32::Reg_NUM];
1325 1325
1326 } // end of namespace MIPS32 1326 } // end of namespace MIPS32
1327 } // end of namespace Ice 1327 } // end of namespace Ice
OLDNEW
« no previous file with comments | « src/IceTargetLoweringARM32.cpp ('k') | src/IceTargetLoweringX86BaseImpl.h » ('j') | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698