Subzero: Improve non-MINIMAL string performance.

src/IceTargetLoweringARM32.cpp

 //===- subzero/src/IceTargetLoweringARM32.cpp - ARM32 lowering ------------===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 1252 matching lines @@
 
 void TargetARM32::emitVariable(const Variable *Var) const {
   if (!BuildDefs::dump())
     return;
   Ostream &Str = Ctx->getStrEmit();
   if (Var->hasReg()) {
     Str << getRegName(Var->getRegNum(), Var->getType());
     return;
   }
   if (Var->mustHaveReg()) {
-    llvm::report_fatal_error("Infinite-weight Variable (" + Var->getName(Func) +
+    llvm::report_fatal_error("Infinite-weight Variable (" + Var->getName() +
                              ") has no register assigned - function " +
                              Func->getFunctionName());
   }
   assert(!Var->isRematerializable());
   int32_t Offset = Var->getStackOffset();
   auto BaseRegNum = Var->getBaseRegNum();
   if (BaseRegNum.hasNoValue()) {
     BaseRegNum = getFrameOrStackReg();
   }
   const Type VarTy = Var->getType();
@@ skipping 111 matching lines @@
         continue;
       }
     } else {
       if (!CC.argInVFP(Ty, &RegNum)) {
         continue;
       }
     }
 
     Variable *RegisterArg = Func->makeVariable(Ty);
     if (BuildDefs::dump()) {
-      RegisterArg->setName(Func, "home_reg:" + Arg->getName(Func));
+      RegisterArg->setName(Func, "home_reg:" + Arg->getName());
     }
     RegisterArg->setIsArg();
     Arg->setIsArg(false);
     Args[I] = RegisterArg;
     switch (Ty) {
     default: { RegisterArg->setRegNum(RegNum); } break;
     case IceType_i64: {
       auto *RegisterArg64 = llvm::cast<Variable64On32>(RegisterArg);
       RegisterArg64->initHiLo(Func);
       RegisterArg64->getLo()->setRegNum(
@@ skipping 5496 matching lines @@
   // However, for compatibility with current NaCl LLVM, don't claim that.
   Str << ".eabi_attribute 14, 3   @ Tag_ABI_PCS_R9_use: Not used\n";
 }
 
 SmallBitVector TargetARM32::TypeToRegisterSet[RegARM32::RCARM32_NUM];
 SmallBitVector TargetARM32::TypeToRegisterSetUnfiltered[RegARM32::RCARM32_NUM];
 SmallBitVector TargetARM32::RegisterAliases[RegARM32::Reg_NUM];
 
 } // end of namespace ARM32
 } // end of namespace Ice