Subzero: Improve non-MINIMAL string performance.

src/IceCfgNode.cpp

 //===- subzero/src/IceCfgNode.cpp - Basic block (node) implementation -----===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
 /// \brief Implements the CfgNode class, including the complexities of
 /// instruction insertion and in-edge calculation.
 ///
 //===----------------------------------------------------------------------===//
 
 #include "IceCfgNode.h"
 
 #include "IceAssembler.h"
 #include "IceCfg.h"
 #include "IceGlobalInits.h"
 #include "IceInst.h"
 #include "IceInstVarIter.h"
 #include "IceLiveness.h"
 #include "IceOperand.h"
 #include "IceTargetLowering.h"
 
 namespace Ice {
 
-CfgNode::CfgNode(Cfg *Func, SizeT Number) : Func(Func), Number(Number) {
-  if (BuildDefs::dump()) {
-    Name =
-        NodeString::createWithString(Func, "__" + std::to_string(getIndex()));
-  } else {
-    Name = NodeString::createWithoutString(Func);
-  }
-}
-
 // Adds an instruction to either the Phi list or the regular instruction list.
 // Validates that all Phis are added before all regular instructions.
 void CfgNode::appendInst(Inst *Instr, bool AllowPhisAnywhere) {
   ++InstCountEstimate;
 
   if (BuildDefs::wasm()) {
     if (llvm::isa<InstSwitch>(Instr) || llvm::isa<InstBr>(Instr)) {
       for (auto *N : Instr->getTerminatorEdges()) {
         N->addInEdge(this);
         addOutEdge(N);
@@ skipping 742 matching lines @@
       Str << "Live range errors in the following block:\n";
       dump(Func);
     }
     for (auto Start = MapBegin.begin();
          (Start = std::adjacent_find(Start, MapBegin.end(), ComparePair)) !=
          MapBegin.end();
          ++Start) {
       auto Next = Start + 1;
       Str << "Duplicate LR begin, block " << getName() << ", instructions "
           << Start->second << " & " << Next->second << ", variable "
-          << Liveness->getVariable(Start->first, this)->getName(Func) << "\n";
+          << Liveness->getVariable(Start->first, this)->getName() << "\n";
     }
     for (auto Start = MapEnd.begin();
          (Start = std::adjacent_find(Start, MapEnd.end(), ComparePair)) !=
          MapEnd.end();
          ++Start) {
       auto Next = Start + 1;
       Str << "Duplicate LR end,   block " << getName() << ", instructions "
           << Start->second << " & " << Next->second << ", variable "
-          << Liveness->getVariable(Start->first, this)->getName(Func) << "\n";
+          << Liveness->getVariable(Start->first, this)->getName() << "\n";
     }
   }
 
   return false;
 }
 
 // Once basic liveness is complete, compute actual live ranges. It is assumed
 // that within a single basic block, a live range begins at most once and ends
 // at most once. This is certainly true for pure SSA form. It is also true once
 // phis are lowered, since each assignment to the phi-based temporary is in a
@@ skipping 575 matching lines @@
     Str << "\n";
   }
   // Dump the live-in variables.
   if (Func->isVerbose(IceV_Liveness)) {
     if (Liveness != nullptr && !Liveness->getLiveIn(this).empty()) {
       const LivenessBV &LiveIn = Liveness->getLiveIn(this);
       Str << "    // LiveIn:";
       for (SizeT i = 0; i < LiveIn.size(); ++i) {
         if (LiveIn[i]) {
           Variable *Var = Liveness->getVariable(i, this);
-          Str << " %" << Var->getName(Func);
+          Str << " %" << Var->getName();
           if (Func->isVerbose(IceV_RegOrigins) && Var->hasReg()) {
             Str << ":"
                 << Func->getTarget()->getRegName(Var->getRegNum(),
                                                  Var->getType());
           }
         }
       }
       Str << "\n";
     }
   }
   // Dump each instruction.
   if (Func->isVerbose(IceV_Instructions)) {
     for (const Inst &I : Phis)
       I.dumpDecorated(Func);
     for (const Inst &I : Insts)
       I.dumpDecorated(Func);
   }
   // Dump the live-out variables.
   if (Func->isVerbose(IceV_Liveness)) {
     if (Liveness != nullptr && !Liveness->getLiveOut(this).empty()) {
       const LivenessBV &LiveOut = Liveness->getLiveOut(this);
       Str << "    // LiveOut:";
       for (SizeT i = 0; i < LiveOut.size(); ++i) {
         if (LiveOut[i]) {
           Variable *Var = Liveness->getVariable(i, this);
-          Str << " %" << Var->getName(Func);
+          Str << " %" << Var->getName();
           if (Func->isVerbose(IceV_RegOrigins) && Var->hasReg()) {
             Str << ":"
                 << Func->getTarget()->getRegName(Var->getRegNum(),
                                                  Var->getType());
           }
         }
       }
       Str << "\n";
     }
   }
@@ skipping 32 matching lines @@
   auto *Instr = InstIntrinsicCall::create(
       Func, 5, Func->makeVariable(IceType_i64), RMWI64Name, Info->Info);
   Instr->addArg(AtomicRMWOp);
   Instr->addArg(Counter);
   Instr->addArg(One);
   Instr->addArg(OrderAcquireRelease);
   Insts.push_front(Instr);
 }
 
 } // end of namespace Ice