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| 1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
| 2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
| 3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
| 4 | 4 |
| 5 #include <assert.h> // For assert | 5 #include <assert.h> // For assert |
| 6 #include <limits.h> // For LONG_MIN, LONG_MAX. | 6 #include <limits.h> // For LONG_MIN, LONG_MAX. |
| 7 | 7 |
| 8 #if V8_TARGET_ARCH_S390 | 8 #if V8_TARGET_ARCH_S390 |
| 9 | 9 |
| 10 #include "src/base/bits.h" | 10 #include "src/base/bits.h" |
| (...skipping 926 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 937 srda(r0, shift, Operand::Zero()); | 937 srda(r0, shift, Operand::Zero()); |
| 938 LoadRR(dst_high, r0); | 938 LoadRR(dst_high, r0); |
| 939 LoadRR(dst_low, r1); | 939 LoadRR(dst_low, r1); |
| 940 } | 940 } |
| 941 | 941 |
| 942 void MacroAssembler::ShiftRightArithPair(Register dst_low, Register dst_high, | 942 void MacroAssembler::ShiftRightArithPair(Register dst_low, Register dst_high, |
| 943 Register src_low, Register src_high, | 943 Register src_low, Register src_high, |
| 944 uint32_t shift) { | 944 uint32_t shift) { |
| 945 LoadRR(r0, src_high); | 945 LoadRR(r0, src_high); |
| 946 LoadRR(r1, src_low); | 946 LoadRR(r1, src_low); |
| 947 srdl(r0, r0, Operand(shift)); | 947 srda(r0, r0, Operand(shift)); |
| 948 LoadRR(dst_high, r0); | 948 LoadRR(dst_high, r0); |
| 949 LoadRR(dst_low, r1); | 949 LoadRR(dst_low, r1); |
| 950 } | 950 } |
| 951 #endif | 951 #endif |
| 952 | 952 |
| 953 void MacroAssembler::MovDoubleToInt64(Register dst, DoubleRegister src) { | 953 void MacroAssembler::MovDoubleToInt64(Register dst, DoubleRegister src) { |
| 954 lgdr(dst, src); | 954 lgdr(dst, src); |
| 955 } | 955 } |
| 956 | 956 |
| 957 void MacroAssembler::MovInt64ToDouble(DoubleRegister dst, Register src) { | 957 void MacroAssembler::MovInt64ToDouble(DoubleRegister dst, Register src) { |
| (...skipping 4441 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 5399 } | 5399 } |
| 5400 if (mag.shift > 0) ShiftRightArith(result, result, Operand(mag.shift)); | 5400 if (mag.shift > 0) ShiftRightArith(result, result, Operand(mag.shift)); |
| 5401 ExtractBit(r0, dividend, 31); | 5401 ExtractBit(r0, dividend, 31); |
| 5402 AddP(result, r0); | 5402 AddP(result, r0); |
| 5403 } | 5403 } |
| 5404 | 5404 |
| 5405 } // namespace internal | 5405 } // namespace internal |
| 5406 } // namespace v8 | 5406 } // namespace v8 |
| 5407 | 5407 |
| 5408 #endif // V8_TARGET_ARCH_S390 | 5408 #endif // V8_TARGET_ARCH_S390 |
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