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Side by Side Diff: src/compiler/opcodes.h

Issue 1850373002: Revert of Turbofan: Add MachineOperators for SIMD. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 4 years, 8 months ago
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1 // Copyright 2013 the V8 project authors. All rights reserved. 1 // Copyright 2013 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_COMPILER_OPCODES_H_ 5 #ifndef V8_COMPILER_OPCODES_H_
6 #define V8_COMPILER_OPCODES_H_ 6 #define V8_COMPILER_OPCODES_H_
7 7
8 #include <iosfwd> 8 #include <iosfwd>
9 9
10 // Opcodes for control operators. 10 // Opcodes for control operators.
(...skipping 332 matching lines...) Expand 10 before | Expand all | Expand 10 after
343 V(LoadParentFramePointer) \ 343 V(LoadParentFramePointer) \
344 V(CheckedLoad) \ 344 V(CheckedLoad) \
345 V(CheckedStore) \ 345 V(CheckedStore) \
346 V(Int32PairAdd) \ 346 V(Int32PairAdd) \
347 V(Int32PairSub) \ 347 V(Int32PairSub) \
348 V(Int32PairMul) \ 348 V(Int32PairMul) \
349 V(Word32PairShl) \ 349 V(Word32PairShl) \
350 V(Word32PairShr) \ 350 V(Word32PairShr) \
351 V(Word32PairSar) 351 V(Word32PairSar)
352 352
353 #define MACHINE_SIMD_RETURN_SIMD_OP_LIST(V) \ 353 #define VALUE_OP_LIST(V) \
354 V(CreateFloat32x4) \ 354 COMMON_OP_LIST(V) \
355 V(Float32x4ReplaceLane) \ 355 SIMPLIFIED_OP_LIST(V) \
356 V(Float32x4Abs) \ 356 MACHINE_OP_LIST(V) \
357 V(Float32x4Neg) \
358 V(Float32x4Sqrt) \
359 V(Float32x4RecipApprox) \
360 V(Float32x4RecipSqrtApprox) \
361 V(Float32x4Add) \
362 V(Float32x4Sub) \
363 V(Float32x4Mul) \
364 V(Float32x4Div) \
365 V(Float32x4Min) \
366 V(Float32x4Max) \
367 V(Float32x4MinNum) \
368 V(Float32x4MaxNum) \
369 V(Float32x4Equal) \
370 V(Float32x4NotEqual) \
371 V(Float32x4LessThan) \
372 V(Float32x4LessThanOrEqual) \
373 V(Float32x4GreaterThan) \
374 V(Float32x4GreaterThanOrEqual) \
375 V(Float32x4Select) \
376 V(Float32x4Swizzle) \
377 V(Float32x4Shuffle) \
378 V(Float32x4FromInt32x4) \
379 V(Float32x4FromUint32x4) \
380 V(Float32x4Load1) \
381 V(Float32x4Load2) \
382 V(Float32x4Load3) \
383 V(Float32x4Store1) \
384 V(Float32x4Store2) \
385 V(Float32x4Store3) \
386 V(CreateInt32x4) \
387 V(Int32x4ReplaceLane) \
388 V(Int32x4Neg) \
389 V(Int32x4Add) \
390 V(Int32x4Sub) \
391 V(Int32x4Mul) \
392 V(Int32x4Min) \
393 V(Int32x4Max) \
394 V(Int32x4And) \
395 V(Int32x4Or) \
396 V(Int32x4Xor) \
397 V(Int32x4Not) \
398 V(Int32x4ShiftLeftByScalar) \
399 V(Int32x4ShiftRightByScalar) \
400 V(Int32x4Equal) \
401 V(Int32x4NotEqual) \
402 V(Int32x4LessThan) \
403 V(Int32x4LessThanOrEqual) \
404 V(Int32x4GreaterThan) \
405 V(Int32x4GreaterThanOrEqual) \
406 V(Int32x4Select) \
407 V(Int32x4Swizzle) \
408 V(Int32x4Shuffle) \
409 V(Int32x4FromFloat32x4) \
410 V(Int32x4Load1) \
411 V(Int32x4Load2) \
412 V(Int32x4Load3) \
413 V(Int32x4Store1) \
414 V(Int32x4Store2) \
415 V(Int32x4Store3) \
416 V(Uint32x4Min) \
417 V(Uint32x4Max) \
418 V(Uint32x4ShiftLeftByScalar) \
419 V(Uint32x4ShiftRightByScalar) \
420 V(Uint32x4LessThan) \
421 V(Uint32x4LessThanOrEqual) \
422 V(Uint32x4GreaterThan) \
423 V(Uint32x4GreaterThanOrEqual) \
424 V(Uint32x4FromFloat32x4) \
425 V(CreateBool32x4) \
426 V(Bool32x4ReplaceLane) \
427 V(Bool32x4And) \
428 V(Bool32x4Or) \
429 V(Bool32x4Xor) \
430 V(Bool32x4Not) \
431 V(Bool32x4Swizzle) \
432 V(Bool32x4Shuffle) \
433 V(Bool32x4Equal) \
434 V(Bool32x4NotEqual) \
435 V(CreateInt16x8) \
436 V(Int16x8ReplaceLane) \
437 V(Int16x8Neg) \
438 V(Int16x8Add) \
439 V(Int16x8AddSaturate) \
440 V(Int16x8Sub) \
441 V(Int16x8SubSaturate) \
442 V(Int16x8Mul) \
443 V(Int16x8Min) \
444 V(Int16x8Max) \
445 V(Int16x8And) \
446 V(Int16x8Or) \
447 V(Int16x8Xor) \
448 V(Int16x8Not) \
449 V(Int16x8ShiftLeftByScalar) \
450 V(Int16x8ShiftRightByScalar) \
451 V(Int16x8Equal) \
452 V(Int16x8NotEqual) \
453 V(Int16x8LessThan) \
454 V(Int16x8LessThanOrEqual) \
455 V(Int16x8GreaterThan) \
456 V(Int16x8GreaterThanOrEqual) \
457 V(Int16x8Select) \
458 V(Int16x8Swizzle) \
459 V(Int16x8Shuffle) \
460 V(Uint16x8AddSaturate) \
461 V(Uint16x8SubSaturate) \
462 V(Uint16x8Min) \
463 V(Uint16x8Max) \
464 V(Uint16x8ShiftLeftByScalar) \
465 V(Uint16x8ShiftRightByScalar) \
466 V(Uint16x8LessThan) \
467 V(Uint16x8LessThanOrEqual) \
468 V(Uint16x8GreaterThan) \
469 V(Uint16x8GreaterThanOrEqual) \
470 V(CreateBool16x8) \
471 V(Bool16x8ReplaceLane) \
472 V(Bool16x8And) \
473 V(Bool16x8Or) \
474 V(Bool16x8Xor) \
475 V(Bool16x8Not) \
476 V(Bool16x8Swizzle) \
477 V(Bool16x8Shuffle) \
478 V(Bool16x8Equal) \
479 V(Bool16x8NotEqual) \
480 V(CreateInt8x16) \
481 V(Int8x16ReplaceLane) \
482 V(Int8x16Neg) \
483 V(Int8x16Add) \
484 V(Int8x16AddSaturate) \
485 V(Int8x16Sub) \
486 V(Int8x16SubSaturate) \
487 V(Int8x16Mul) \
488 V(Int8x16Min) \
489 V(Int8x16Max) \
490 V(Int8x16And) \
491 V(Int8x16Or) \
492 V(Int8x16Xor) \
493 V(Int8x16Not) \
494 V(Int8x16ShiftLeftByScalar) \
495 V(Int8x16ShiftRightByScalar) \
496 V(Int8x16Equal) \
497 V(Int8x16NotEqual) \
498 V(Int8x16LessThan) \
499 V(Int8x16LessThanOrEqual) \
500 V(Int8x16GreaterThan) \
501 V(Int8x16GreaterThanOrEqual) \
502 V(Int8x16Select) \
503 V(Int8x16Swizzle) \
504 V(Int8x16Shuffle) \
505 V(Uint8x16AddSaturate) \
506 V(Uint8x16SubSaturate) \
507 V(Uint8x16Min) \
508 V(Uint8x16Max) \
509 V(Uint8x16ShiftLeftByScalar) \
510 V(Uint8x16ShiftRightByScalar) \
511 V(Uint8x16LessThan) \
512 V(Uint8x16LessThanOrEqual) \
513 V(Uint8x16GreaterThan) \
514 V(Uint8x16GreaterThanOrEqual) \
515 V(CreateBool8x16) \
516 V(Bool8x16ReplaceLane) \
517 V(Bool8x16And) \
518 V(Bool8x16Or) \
519 V(Bool8x16Xor) \
520 V(Bool8x16Not) \
521 V(Bool8x16Swizzle) \
522 V(Bool8x16Shuffle) \
523 V(Bool8x16Equal) \
524 V(Bool8x16NotEqual)
525
526 #define MACHINE_SIMD_RETURN_NUM_OP_LIST(V) \
527 V(Float32x4ExtractLane) \
528 V(Int32x4ExtractLane) \
529 V(Int16x8ExtractLane) \
530 V(Int8x16ExtractLane)
531
532 #define MACHINE_SIMD_RETURN_BOOL_OP_LIST(V) \
533 V(Bool32x4ExtractLane) \
534 V(Bool32x4AnyTrue) \
535 V(Bool32x4AllTrue) \
536 V(Bool16x8ExtractLane) \
537 V(Bool16x8AnyTrue) \
538 V(Bool16x8AllTrue) \
539 V(Bool8x16ExtractLane) \
540 V(Bool8x16AnyTrue) \
541 V(Bool8x16AllTrue)
542
543 #define MACHINE_SIMD_OP_LIST(V) \
544 MACHINE_SIMD_RETURN_SIMD_OP_LIST(V) \
545 MACHINE_SIMD_RETURN_NUM_OP_LIST(V) \
546 MACHINE_SIMD_RETURN_BOOL_OP_LIST(V)
547
548 #define VALUE_OP_LIST(V) \
549 COMMON_OP_LIST(V) \
550 SIMPLIFIED_OP_LIST(V) \
551 MACHINE_OP_LIST(V) \
552 MACHINE_SIMD_OP_LIST(V) \
553 JS_OP_LIST(V) 357 JS_OP_LIST(V)
554 358
555 // The combination of all operators at all levels and the common operators. 359 // The combination of all operators at all levels and the common operators.
556 #define ALL_OP_LIST(V) \ 360 #define ALL_OP_LIST(V) \
557 CONTROL_OP_LIST(V) \ 361 CONTROL_OP_LIST(V) \
558 VALUE_OP_LIST(V) 362 VALUE_OP_LIST(V)
559 363
560 namespace v8 { 364 namespace v8 {
561 namespace internal { 365 namespace internal {
562 namespace compiler { 366 namespace compiler {
(...skipping 60 matching lines...) Expand 10 before | Expand all | Expand 10 after
623 } 427 }
624 }; 428 };
625 429
626 std::ostream& operator<<(std::ostream&, IrOpcode::Value); 430 std::ostream& operator<<(std::ostream&, IrOpcode::Value);
627 431
628 } // namespace compiler 432 } // namespace compiler
629 } // namespace internal 433 } // namespace internal
630 } // namespace v8 434 } // namespace v8
631 435
632 #endif // V8_COMPILER_OPCODES_H_ 436 #endif // V8_COMPILER_OPCODES_H_
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