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Unified Diff: src/compiler/s390/code-generator-s390.cc

Issue 1849543003: S390: [wasm] Int64Lowering of Int64Mul on ia32 and arm. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 4 years, 9 months ago
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Index: src/compiler/s390/code-generator-s390.cc
diff --git a/src/compiler/s390/code-generator-s390.cc b/src/compiler/s390/code-generator-s390.cc
index 2759c50dbdd649e2a85b132a4796385c9569a03a..f3314737b48afdd148ae9f94be9727d84980a05d 100644
--- a/src/compiler/s390/code-generator-s390.cc
+++ b/src/compiler/s390/code-generator-s390.cc
@@ -882,6 +882,36 @@ void CodeGenerator::AssembleArchInstruction(Instruction* instr) {
__ SubLogicalWithBorrow32(i.OutputRegister(1), i.InputRegister(1),
i.InputRegister(3));
break;
+ case kS390_MulPair:
JoranSiu 2016/03/30 21:23:19 Why don't we load the full 64-bit value in R0 and
john.yan 2016/03/31 03:50:36 OK.
+ // r3 i.InputRegister(0) ... left low word.
+ // r2 i.InputRegister(1) ... left high word.
+ // r5 i.InputRegister(2) ... right low word.
+ // r4 i.InputRegister(3) ... right high word.
+ // The following sequence was inspired by gcc
+ // r1 = (I1 + (I0 >> 31)) * I2
+ // r0 = (I3 + (I2 >> 31)) * I0
+ // r1 += r0
+ // push r1
+ // r0:r1 = I0 * I2
+ // O0 = r1
+ // pop O1
+ // O1 += r0
+ __ lr(r1, i.InputRegister(0));
+ __ lr(r0, i.InputRegister(2));
+ __ srl(r1, Operand(31));
+ __ srl(r0, Operand(31));
+ __ ar(r1, i.InputRegister(1));
+ __ ar(r0, i.InputRegister(3));
+ __ msr(r1, i.InputRegister(2));
+ __ msr(r0, i.InputRegister(0));
+ __ ar(r1, r0);
+ __ push(r1);
+ __ lr(r1, i.InputRegister(0));
+ __ mr_z(r0, i.InputRegister(2));
+ __ lr(i.OutputRegister(0), r1);
+ __ pop(i.OutputRegister(1));
+ __ ar(i.OutputRegister(1), r0);
+ break;
case kS390_ShiftLeftPair:
if (instr->InputAt(2)->IsImmediate()) {
__ ShiftLeftPair(i.OutputRegister(0), i.OutputRegister(1),
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