Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(238)

Side by Side Diff: src/compiler/opcodes.h

Issue 1848433003: Turbofan: Add MachineOperators for SIMD. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Rebase. Created 4 years, 7 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch
« no previous file with comments | « src/compiler/machine-operator.cc ('k') | src/compiler/typer.cc » ('j') | no next file with comments »
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
1 // Copyright 2013 the V8 project authors. All rights reserved. 1 // Copyright 2013 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_COMPILER_OPCODES_H_ 5 #ifndef V8_COMPILER_OPCODES_H_
6 #define V8_COMPILER_OPCODES_H_ 6 #define V8_COMPILER_OPCODES_H_
7 7
8 #include <iosfwd> 8 #include <iosfwd>
9 9
10 // Opcodes for control operators. 10 // Opcodes for control operators.
(...skipping 341 matching lines...) Expand 10 before | Expand all | Expand 10 after
352 V(CheckedLoad) \ 352 V(CheckedLoad) \
353 V(CheckedStore) \ 353 V(CheckedStore) \
354 V(Int32PairAdd) \ 354 V(Int32PairAdd) \
355 V(Int32PairSub) \ 355 V(Int32PairSub) \
356 V(Int32PairMul) \ 356 V(Int32PairMul) \
357 V(Word32PairShl) \ 357 V(Word32PairShl) \
358 V(Word32PairShr) \ 358 V(Word32PairShr) \
359 V(Word32PairSar) \ 359 V(Word32PairSar) \
360 V(AtomicLoad) 360 V(AtomicLoad)
361 361
362 #define VALUE_OP_LIST(V) \ 362 #define MACHINE_SIMD_RETURN_SIMD_OP_LIST(V) \
363 COMMON_OP_LIST(V) \ 363 V(CreateFloat32x4) \
364 SIMPLIFIED_OP_LIST(V) \ 364 V(Float32x4ReplaceLane) \
365 MACHINE_OP_LIST(V) \ 365 V(Float32x4Abs) \
366 V(Float32x4Neg) \
367 V(Float32x4Sqrt) \
368 V(Float32x4RecipApprox) \
369 V(Float32x4RecipSqrtApprox) \
370 V(Float32x4Add) \
371 V(Float32x4Sub) \
372 V(Float32x4Mul) \
373 V(Float32x4Div) \
374 V(Float32x4Min) \
375 V(Float32x4Max) \
376 V(Float32x4MinNum) \
377 V(Float32x4MaxNum) \
378 V(Float32x4Equal) \
379 V(Float32x4NotEqual) \
380 V(Float32x4LessThan) \
381 V(Float32x4LessThanOrEqual) \
382 V(Float32x4GreaterThan) \
383 V(Float32x4GreaterThanOrEqual) \
384 V(Float32x4Select) \
385 V(Float32x4Swizzle) \
386 V(Float32x4Shuffle) \
387 V(Float32x4FromInt32x4) \
388 V(Float32x4FromUint32x4) \
389 V(CreateInt32x4) \
390 V(Int32x4ReplaceLane) \
391 V(Int32x4Neg) \
392 V(Int32x4Add) \
393 V(Int32x4Sub) \
394 V(Int32x4Mul) \
395 V(Int32x4Min) \
396 V(Int32x4Max) \
397 V(Int32x4ShiftLeftByScalar) \
398 V(Int32x4ShiftRightByScalar) \
399 V(Int32x4Equal) \
400 V(Int32x4NotEqual) \
401 V(Int32x4LessThan) \
402 V(Int32x4LessThanOrEqual) \
403 V(Int32x4GreaterThan) \
404 V(Int32x4GreaterThanOrEqual) \
405 V(Int32x4Select) \
406 V(Int32x4Swizzle) \
407 V(Int32x4Shuffle) \
408 V(Int32x4FromFloat32x4) \
409 V(Uint32x4Min) \
410 V(Uint32x4Max) \
411 V(Uint32x4ShiftLeftByScalar) \
412 V(Uint32x4ShiftRightByScalar) \
413 V(Uint32x4LessThan) \
414 V(Uint32x4LessThanOrEqual) \
415 V(Uint32x4GreaterThan) \
416 V(Uint32x4GreaterThanOrEqual) \
417 V(Uint32x4FromFloat32x4) \
418 V(CreateBool32x4) \
419 V(Bool32x4ReplaceLane) \
420 V(Bool32x4And) \
421 V(Bool32x4Or) \
422 V(Bool32x4Xor) \
423 V(Bool32x4Not) \
424 V(Bool32x4Swizzle) \
425 V(Bool32x4Shuffle) \
426 V(Bool32x4Equal) \
427 V(Bool32x4NotEqual) \
428 V(CreateInt16x8) \
429 V(Int16x8ReplaceLane) \
430 V(Int16x8Neg) \
431 V(Int16x8Add) \
432 V(Int16x8AddSaturate) \
433 V(Int16x8Sub) \
434 V(Int16x8SubSaturate) \
435 V(Int16x8Mul) \
436 V(Int16x8Min) \
437 V(Int16x8Max) \
438 V(Int16x8ShiftLeftByScalar) \
439 V(Int16x8ShiftRightByScalar) \
440 V(Int16x8Equal) \
441 V(Int16x8NotEqual) \
442 V(Int16x8LessThan) \
443 V(Int16x8LessThanOrEqual) \
444 V(Int16x8GreaterThan) \
445 V(Int16x8GreaterThanOrEqual) \
446 V(Int16x8Select) \
447 V(Int16x8Swizzle) \
448 V(Int16x8Shuffle) \
449 V(Uint16x8AddSaturate) \
450 V(Uint16x8SubSaturate) \
451 V(Uint16x8Min) \
452 V(Uint16x8Max) \
453 V(Uint16x8ShiftLeftByScalar) \
454 V(Uint16x8ShiftRightByScalar) \
455 V(Uint16x8LessThan) \
456 V(Uint16x8LessThanOrEqual) \
457 V(Uint16x8GreaterThan) \
458 V(Uint16x8GreaterThanOrEqual) \
459 V(CreateBool16x8) \
460 V(Bool16x8ReplaceLane) \
461 V(Bool16x8And) \
462 V(Bool16x8Or) \
463 V(Bool16x8Xor) \
464 V(Bool16x8Not) \
465 V(Bool16x8Swizzle) \
466 V(Bool16x8Shuffle) \
467 V(Bool16x8Equal) \
468 V(Bool16x8NotEqual) \
469 V(CreateInt8x16) \
470 V(Int8x16ReplaceLane) \
471 V(Int8x16Neg) \
472 V(Int8x16Add) \
473 V(Int8x16AddSaturate) \
474 V(Int8x16Sub) \
475 V(Int8x16SubSaturate) \
476 V(Int8x16Mul) \
477 V(Int8x16Min) \
478 V(Int8x16Max) \
479 V(Int8x16ShiftLeftByScalar) \
480 V(Int8x16ShiftRightByScalar) \
481 V(Int8x16Equal) \
482 V(Int8x16NotEqual) \
483 V(Int8x16LessThan) \
484 V(Int8x16LessThanOrEqual) \
485 V(Int8x16GreaterThan) \
486 V(Int8x16GreaterThanOrEqual) \
487 V(Int8x16Select) \
488 V(Int8x16Swizzle) \
489 V(Int8x16Shuffle) \
490 V(Uint8x16AddSaturate) \
491 V(Uint8x16SubSaturate) \
492 V(Uint8x16Min) \
493 V(Uint8x16Max) \
494 V(Uint8x16ShiftLeftByScalar) \
495 V(Uint8x16ShiftRightByScalar) \
496 V(Uint8x16LessThan) \
497 V(Uint8x16LessThanOrEqual) \
498 V(Uint8x16GreaterThan) \
499 V(Uint8x16GreaterThanOrEqual) \
500 V(CreateBool8x16) \
501 V(Bool8x16ReplaceLane) \
502 V(Bool8x16And) \
503 V(Bool8x16Or) \
504 V(Bool8x16Xor) \
505 V(Bool8x16Not) \
506 V(Bool8x16Swizzle) \
507 V(Bool8x16Shuffle) \
508 V(Bool8x16Equal) \
509 V(Bool8x16NotEqual) \
510 V(Simd128Load) \
511 V(Simd128Load1) \
512 V(Simd128Load2) \
513 V(Simd128Load3) \
514 V(Simd128Store) \
515 V(Simd128Store1) \
516 V(Simd128Store2) \
517 V(Simd128Store3) \
518 V(Simd128And) \
519 V(Simd128Or) \
520 V(Simd128Xor) \
521 V(Simd128Not)
522
523 #define MACHINE_SIMD_RETURN_NUM_OP_LIST(V) \
524 V(Float32x4ExtractLane) \
525 V(Int32x4ExtractLane) \
526 V(Int16x8ExtractLane) \
527 V(Int8x16ExtractLane)
528
529 #define MACHINE_SIMD_RETURN_BOOL_OP_LIST(V) \
530 V(Bool32x4ExtractLane) \
531 V(Bool32x4AnyTrue) \
532 V(Bool32x4AllTrue) \
533 V(Bool16x8ExtractLane) \
534 V(Bool16x8AnyTrue) \
535 V(Bool16x8AllTrue) \
536 V(Bool8x16ExtractLane) \
537 V(Bool8x16AnyTrue) \
538 V(Bool8x16AllTrue)
539
540 #define MACHINE_SIMD_OP_LIST(V) \
541 MACHINE_SIMD_RETURN_SIMD_OP_LIST(V) \
542 MACHINE_SIMD_RETURN_NUM_OP_LIST(V) \
543 MACHINE_SIMD_RETURN_BOOL_OP_LIST(V)
544
545 #define VALUE_OP_LIST(V) \
546 COMMON_OP_LIST(V) \
547 SIMPLIFIED_OP_LIST(V) \
548 MACHINE_OP_LIST(V) \
549 MACHINE_SIMD_OP_LIST(V) \
366 JS_OP_LIST(V) 550 JS_OP_LIST(V)
367 551
368 // The combination of all operators at all levels and the common operators. 552 // The combination of all operators at all levels and the common operators.
369 #define ALL_OP_LIST(V) \ 553 #define ALL_OP_LIST(V) \
370 CONTROL_OP_LIST(V) \ 554 CONTROL_OP_LIST(V) \
371 VALUE_OP_LIST(V) 555 VALUE_OP_LIST(V)
372 556
373 namespace v8 { 557 namespace v8 {
374 namespace internal { 558 namespace internal {
375 namespace compiler { 559 namespace compiler {
(...skipping 60 matching lines...) Expand 10 before | Expand all | Expand 10 after
436 } 620 }
437 }; 621 };
438 622
439 std::ostream& operator<<(std::ostream&, IrOpcode::Value); 623 std::ostream& operator<<(std::ostream&, IrOpcode::Value);
440 624
441 } // namespace compiler 625 } // namespace compiler
442 } // namespace internal 626 } // namespace internal
443 } // namespace v8 627 } // namespace v8
444 628
445 #endif // V8_COMPILER_OPCODES_H_ 629 #endif // V8_COMPILER_OPCODES_H_
OLDNEW
« no previous file with comments | « src/compiler/machine-operator.cc ('k') | src/compiler/typer.cc » ('j') | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698