OLD | NEW |
1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #ifndef V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ | 5 #ifndef V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ |
6 #define V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ | 6 #define V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ |
7 | 7 |
8 namespace v8 { | 8 namespace v8 { |
9 namespace internal { | 9 namespace internal { |
10 namespace compiler { | 10 namespace compiler { |
(...skipping 41 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
52 V(MipsCmpD) \ | 52 V(MipsCmpD) \ |
53 V(MipsAddD) \ | 53 V(MipsAddD) \ |
54 V(MipsSubD) \ | 54 V(MipsSubD) \ |
55 V(MipsMulD) \ | 55 V(MipsMulD) \ |
56 V(MipsDivD) \ | 56 V(MipsDivD) \ |
57 V(MipsModD) \ | 57 V(MipsModD) \ |
58 V(MipsAbsD) \ | 58 V(MipsAbsD) \ |
59 V(MipsSqrtD) \ | 59 V(MipsSqrtD) \ |
60 V(MipsMaxD) \ | 60 V(MipsMaxD) \ |
61 V(MipsMinD) \ | 61 V(MipsMinD) \ |
| 62 V(MipsMulPair) \ |
62 V(MipsFloat32RoundDown) \ | 63 V(MipsFloat32RoundDown) \ |
63 V(MipsFloat32RoundTruncate) \ | 64 V(MipsFloat32RoundTruncate) \ |
64 V(MipsFloat32RoundUp) \ | 65 V(MipsFloat32RoundUp) \ |
65 V(MipsFloat32RoundTiesEven) \ | 66 V(MipsFloat32RoundTiesEven) \ |
66 V(MipsFloat64RoundDown) \ | 67 V(MipsFloat64RoundDown) \ |
67 V(MipsFloat64RoundTruncate) \ | 68 V(MipsFloat64RoundTruncate) \ |
68 V(MipsFloat64RoundUp) \ | 69 V(MipsFloat64RoundUp) \ |
69 V(MipsFloat64RoundTiesEven) \ | 70 V(MipsFloat64RoundTiesEven) \ |
70 V(MipsCvtSD) \ | 71 V(MipsCvtSD) \ |
71 V(MipsCvtDS) \ | 72 V(MipsCvtDS) \ |
(...skipping 52 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
124 #define TARGET_ADDRESSING_MODE_LIST(V) \ | 125 #define TARGET_ADDRESSING_MODE_LIST(V) \ |
125 V(MRI) /* [%r0 + K] */ \ | 126 V(MRI) /* [%r0 + K] */ \ |
126 V(MRR) /* [%r0 + %r1] */ | 127 V(MRR) /* [%r0 + %r1] */ |
127 | 128 |
128 | 129 |
129 } // namespace compiler | 130 } // namespace compiler |
130 } // namespace internal | 131 } // namespace internal |
131 } // namespace v8 | 132 } // namespace v8 |
132 | 133 |
133 #endif // V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ | 134 #endif // V8_COMPILER_MIPS_INSTRUCTION_CODES_MIPS_H_ |
OLD | NEW |