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Side by Side Diff: runtime/vm/assembler_arm.cc

Issue 1846063002: - Fix the hash code for raw objects that are added into the object pool (Closed) Base URL: git@github.com:dart-lang/sdk.git@master
Patch Set: fix Created 4 years, 8 months ago
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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #include "vm/globals.h" // NOLINT 5 #include "vm/globals.h" // NOLINT
6 #if defined(TARGET_ARCH_ARM) 6 #if defined(TARGET_ARCH_ARM)
7 7
8 #include "vm/assembler.h" 8 #include "vm/assembler.h"
9 #include "vm/cpu.h" 9 #include "vm/cpu.h"
10 #include "vm/longjump.h" 10 #include "vm/longjump.h"
(...skipping 2702 matching lines...) Expand 10 before | Expand all | Expand 10 after
2713 2713
2714 Vreciprocalqs(qd, qm); 2714 Vreciprocalqs(qd, qm);
2715 vmulqs(qd, qn, qd); 2715 vmulqs(qd, qn, qd);
2716 } 2716 }
2717 2717
2718 2718
2719 void Assembler::Branch(const StubEntry& stub_entry, 2719 void Assembler::Branch(const StubEntry& stub_entry,
2720 Patchability patchable, 2720 Patchability patchable,
2721 Register pp, 2721 Register pp,
2722 Condition cond) { 2722 Condition cond) {
2723 const Code& target_code = Code::Handle(stub_entry.code()); 2723 const Code& target_code = Code::ZoneHandle(stub_entry.code());
2724 const int32_t offset = ObjectPool::element_offset( 2724 const int32_t offset = ObjectPool::element_offset(
2725 object_pool_wrapper_.FindObject(target_code, patchable)); 2725 object_pool_wrapper_.FindObject(target_code, patchable));
2726 LoadWordFromPoolOffset(CODE_REG, offset - kHeapObjectTag, pp, cond); 2726 LoadWordFromPoolOffset(CODE_REG, offset - kHeapObjectTag, pp, cond);
2727 ldr(IP, FieldAddress(CODE_REG, Code::entry_point_offset()), cond); 2727 ldr(IP, FieldAddress(CODE_REG, Code::entry_point_offset()), cond);
2728 bx(IP, cond); 2728 bx(IP, cond);
2729 } 2729 }
2730 2730
2731 2731
2732 void Assembler::BranchLink(const Code& target, Patchability patchable) { 2732 void Assembler::BranchLink(const Code& target, Patchability patchable) {
2733 // Make sure that class CallPattern is able to patch the label referred 2733 // Make sure that class CallPattern is able to patch the label referred
2734 // to by this code sequence. 2734 // to by this code sequence.
2735 // For added code robustness, use 'blx lr' in a patchable sequence and 2735 // For added code robustness, use 'blx lr' in a patchable sequence and
2736 // use 'blx ip' in a non-patchable sequence (see other BranchLink flavors). 2736 // use 'blx ip' in a non-patchable sequence (see other BranchLink flavors).
2737 const int32_t offset = ObjectPool::element_offset( 2737 const int32_t offset = ObjectPool::element_offset(
2738 object_pool_wrapper_.FindObject(target, patchable)); 2738 object_pool_wrapper_.FindObject(target, patchable));
2739 LoadWordFromPoolOffset(CODE_REG, offset - kHeapObjectTag, PP, AL); 2739 LoadWordFromPoolOffset(CODE_REG, offset - kHeapObjectTag, PP, AL);
2740 ldr(LR, FieldAddress(CODE_REG, Code::entry_point_offset())); 2740 ldr(LR, FieldAddress(CODE_REG, Code::entry_point_offset()));
2741 blx(LR); // Use blx instruction so that the return branch prediction works. 2741 blx(LR); // Use blx instruction so that the return branch prediction works.
2742 } 2742 }
2743 2743
2744 2744
2745 void Assembler::BranchLink(const StubEntry& stub_entry, 2745 void Assembler::BranchLink(const StubEntry& stub_entry,
2746 Patchability patchable) { 2746 Patchability patchable) {
2747 const Code& code = Code::Handle(stub_entry.code()); 2747 const Code& code = Code::ZoneHandle(stub_entry.code());
2748 BranchLink(code, patchable); 2748 BranchLink(code, patchable);
2749 } 2749 }
2750 2750
2751 2751
2752 void Assembler::BranchLinkPatchable(const Code& target) { 2752 void Assembler::BranchLinkPatchable(const Code& target) {
2753 BranchLink(target, kPatchable); 2753 BranchLink(target, kPatchable);
2754 } 2754 }
2755 2755
2756 2756
2757 void Assembler::BranchLinkToRuntime() { 2757 void Assembler::BranchLinkToRuntime() {
2758 ldr(IP, Address(THR, Thread::call_to_runtime_entry_point_offset())); 2758 ldr(IP, Address(THR, Thread::call_to_runtime_entry_point_offset()));
2759 ldr(CODE_REG, Address(THR, Thread::call_to_runtime_stub_offset())); 2759 ldr(CODE_REG, Address(THR, Thread::call_to_runtime_stub_offset()));
2760 blx(IP); 2760 blx(IP);
2761 } 2761 }
2762 2762
2763 2763
2764 void Assembler::BranchLinkWithEquivalence(const StubEntry& stub_entry, 2764 void Assembler::BranchLinkWithEquivalence(const StubEntry& stub_entry,
2765 const Object& equivalence) { 2765 const Object& equivalence) {
2766 const Code& target = Code::Handle(stub_entry.code()); 2766 const Code& target = Code::ZoneHandle(stub_entry.code());
2767 // Make sure that class CallPattern is able to patch the label referred 2767 // Make sure that class CallPattern is able to patch the label referred
2768 // to by this code sequence. 2768 // to by this code sequence.
2769 // For added code robustness, use 'blx lr' in a patchable sequence and 2769 // For added code robustness, use 'blx lr' in a patchable sequence and
2770 // use 'blx ip' in a non-patchable sequence (see other BranchLink flavors). 2770 // use 'blx ip' in a non-patchable sequence (see other BranchLink flavors).
2771 const int32_t offset = ObjectPool::element_offset( 2771 const int32_t offset = ObjectPool::element_offset(
2772 object_pool_wrapper_.FindObject(target, equivalence)); 2772 object_pool_wrapper_.FindObject(target, equivalence));
2773 LoadWordFromPoolOffset(CODE_REG, offset - kHeapObjectTag, PP, AL); 2773 LoadWordFromPoolOffset(CODE_REG, offset - kHeapObjectTag, PP, AL);
2774 ldr(LR, FieldAddress(CODE_REG, Code::entry_point_offset())); 2774 ldr(LR, FieldAddress(CODE_REG, Code::entry_point_offset()));
2775 blx(LR); // Use blx instruction so that the return branch prediction works. 2775 blx(LR); // Use blx instruction so that the return branch prediction works.
2776 } 2776 }
2777 2777
2778 2778
2779 void Assembler::BranchLink(const ExternalLabel* label) { 2779 void Assembler::BranchLink(const ExternalLabel* label) {
2780 LoadImmediate(LR, label->address()); // Target address is never patched. 2780 LoadImmediate(LR, label->address()); // Target address is never patched.
2781 blx(LR); // Use blx instruction so that the return branch prediction works. 2781 blx(LR); // Use blx instruction so that the return branch prediction works.
2782 } 2782 }
2783 2783
2784 2784
2785 void Assembler::BranchLinkPatchable(const StubEntry& stub_entry) { 2785 void Assembler::BranchLinkPatchable(const StubEntry& stub_entry) {
2786 BranchLinkPatchable(Code::Handle(stub_entry.code())); 2786 BranchLinkPatchable(Code::ZoneHandle(stub_entry.code()));
2787 } 2787 }
2788 2788
2789 2789
2790 void Assembler::BranchLinkOffset(Register base, int32_t offset) { 2790 void Assembler::BranchLinkOffset(Register base, int32_t offset) {
2791 ASSERT(base != PC); 2791 ASSERT(base != PC);
2792 ASSERT(base != IP); 2792 ASSERT(base != IP);
2793 LoadFromOffset(kWord, IP, base, offset); 2793 LoadFromOffset(kWord, IP, base, offset);
2794 blx(IP); // Use blx instruction so that the return branch prediction works. 2794 blx(IP); // Use blx instruction so that the return branch prediction works.
2795 } 2795 }
2796 2796
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3692 3692
3693 3693
3694 const char* Assembler::FpuRegisterName(FpuRegister reg) { 3694 const char* Assembler::FpuRegisterName(FpuRegister reg) {
3695 ASSERT((0 <= reg) && (reg < kNumberOfFpuRegisters)); 3695 ASSERT((0 <= reg) && (reg < kNumberOfFpuRegisters));
3696 return fpu_reg_names[reg]; 3696 return fpu_reg_names[reg];
3697 } 3697 }
3698 3698
3699 } // namespace dart 3699 } // namespace dart
3700 3700
3701 #endif // defined TARGET_ARCH_ARM 3701 #endif // defined TARGET_ARCH_ARM
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