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Side by Side Diff: src/compiler/x64/instruction-selector-x64.cc

Issue 1845043004: [x64] Optimize loading SMIs. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Update Created 4 years, 8 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include <algorithm> 5 #include <algorithm>
6 6
7 #include "src/base/adapters.h" 7 #include "src/base/adapters.h"
8 #include "src/compiler/instruction-selector-impl.h" 8 #include "src/compiler/instruction-selector-impl.h"
9 #include "src/compiler/node-matchers.h" 9 #include "src/compiler/node-matchers.h"
10 #include "src/compiler/node-properties.h" 10 #include "src/compiler/node-properties.h"
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611 } else if (mleft.right().Is(24) && m.right().Is(24)) { 611 } else if (mleft.right().Is(24) && m.right().Is(24)) {
612 Emit(kX64Movsxbl, g.DefineAsRegister(node), g.Use(mleft.left().node())); 612 Emit(kX64Movsxbl, g.DefineAsRegister(node), g.Use(mleft.left().node()));
613 return; 613 return;
614 } 614 }
615 } 615 }
616 VisitWord32Shift(this, node, kX64Sar32); 616 VisitWord32Shift(this, node, kX64Sar32);
617 } 617 }
618 618
619 619
620 void InstructionSelector::VisitWord64Sar(Node* node) { 620 void InstructionSelector::VisitWord64Sar(Node* node) {
621 X64OperandGenerator g(this);
622 Int64BinopMatcher m(node);
623 if (CanCover(m.node(), m.left().node()) && m.left().IsLoad() &&
624 m.right().Is(32)) {
625 // Just load and sign-extend the interesting 4 bytes instead. This happens,
626 // for example, when we're loading and untagging SMIs.
627 BaseWithIndexAndDisplacement64Matcher mleft(m.left().node(), true);
628 if (mleft.matches() && (mleft.displacement() == nullptr ||
629 g.CanBeImmediate(mleft.displacement()))) {
630 size_t input_count = 0;
631 InstructionOperand inputs[3];
632 AddressingMode mode = g.GetEffectiveAddressMemoryOperand(
633 m.left().node(), inputs, &input_count);
634 if (mleft.displacement() == nullptr) {
635 // Make sure that the addressing mode indicates the presence of an
636 // immediate displacement. It seems that we never use M1 and M2, but we
637 // handle them here anyways.
638 switch (mode) {
639 case kMode_MR:
640 mode = kMode_MRI;
641 break;
642 case kMode_MR1:
643 mode = kMode_MR1I;
644 break;
645 case kMode_MR2:
646 mode = kMode_MR2I;
647 break;
648 case kMode_MR4:
649 mode = kMode_MR4I;
650 break;
651 case kMode_MR8:
652 mode = kMode_MR8I;
653 break;
654 case kMode_M1:
655 mode = kMode_M1I;
656 break;
657 case kMode_M2:
658 mode = kMode_M2I;
659 break;
660 case kMode_M4:
661 mode = kMode_M4I;
662 break;
663 case kMode_M8:
664 mode = kMode_M8I;
665 break;
666 case kMode_None:
667 case kMode_MRI:
668 case kMode_MR1I:
669 case kMode_MR2I:
670 case kMode_MR4I:
671 case kMode_MR8I:
672 case kMode_M1I:
673 case kMode_M2I:
674 case kMode_M4I:
675 case kMode_M8I:
676 UNREACHABLE();
677 }
678 inputs[input_count++] = ImmediateOperand(ImmediateOperand::INLINE, 4);
679 } else {
680 ImmediateOperand* op = ImmediateOperand::cast(&inputs[input_count - 1]);
681 int32_t displacement = sequence()->GetImmediate(op).ToInt32();
682 *op = ImmediateOperand(ImmediateOperand::INLINE, displacement + 4);
683 }
684 InstructionOperand outputs[] = {g.DefineAsRegister(node)};
685 InstructionCode code = kX64Movsxlq | AddressingModeField::encode(mode);
686 Emit(code, 1, outputs, input_count, inputs);
687 return;
688 }
689 }
621 VisitWord64Shift(this, node, kX64Sar); 690 VisitWord64Shift(this, node, kX64Sar);
622 } 691 }
623 692
624 693
625 void InstructionSelector::VisitWord32Ror(Node* node) { 694 void InstructionSelector::VisitWord32Ror(Node* node) {
626 VisitWord32Shift(this, node, kX64Ror32); 695 VisitWord32Shift(this, node, kX64Ror32);
627 } 696 }
628 697
629 698
630 void InstructionSelector::VisitWord64Ror(Node* node) { 699 void InstructionSelector::VisitWord64Ror(Node* node) {
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1972 MachineOperatorBuilder::kFloat64RoundTruncate | 2041 MachineOperatorBuilder::kFloat64RoundTruncate |
1973 MachineOperatorBuilder::kFloat32RoundTiesEven | 2042 MachineOperatorBuilder::kFloat32RoundTiesEven |
1974 MachineOperatorBuilder::kFloat64RoundTiesEven; 2043 MachineOperatorBuilder::kFloat64RoundTiesEven;
1975 } 2044 }
1976 return flags; 2045 return flags;
1977 } 2046 }
1978 2047
1979 } // namespace compiler 2048 } // namespace compiler
1980 } // namespace internal 2049 } // namespace internal
1981 } // namespace v8 2050 } // namespace v8
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