Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(385)

Side by Side Diff: src/s390/simulator-s390.cc

Issue 1844563002: S390: Fix Div64 sequence + DLGR simulation (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 4 years, 8 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch
« no previous file with comments | « src/compiler/s390/code-generator-s390.cc ('k') | no next file » | no next file with comments »
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include <stdarg.h> 5 #include <stdarg.h>
6 #include <stdlib.h> 6 #include <stdlib.h>
7 #include <cmath> 7 #include <cmath>
8 8
9 #if V8_TARGET_ARCH_S390 9 #if V8_TARGET_ARCH_S390
10 10
(...skipping 2702 matching lines...) Expand 10 before | Expand all | Expand 10 after
2713 int32_t low_bits = product & 0x00000000FFFFFFFF; 2713 int32_t low_bits = product & 0x00000000FFFFFFFF;
2714 set_low_register(r1, high_bits); 2714 set_low_register(r1, high_bits);
2715 set_low_register(r1 + 1, low_bits); 2715 set_low_register(r1 + 1, low_bits);
2716 break; 2716 break;
2717 } 2717 }
2718 case DLGR: { 2718 case DLGR: {
2719 #ifdef V8_TARGET_ARCH_S390X 2719 #ifdef V8_TARGET_ARCH_S390X
2720 RREInstruction* rreinst = reinterpret_cast<RREInstruction*>(instr); 2720 RREInstruction* rreinst = reinterpret_cast<RREInstruction*>(instr);
2721 int r1 = rreinst->R1Value(); 2721 int r1 = rreinst->R1Value();
2722 int r2 = rreinst->R2Value(); 2722 int r2 = rreinst->R2Value();
2723 uint64_t r1_val = static_cast<uint64_t>(r1); 2723 uint64_t r1_val = get_register(r1);
2724 uint64_t r2_val = static_cast<uint64_t>(r2); 2724 uint64_t r2_val = get_register(r2);
2725 DCHECK(r1 % 2 == 0); 2725 DCHECK(r1 % 2 == 0);
2726 unsigned __int128 dividend = static_cast<unsigned __int128>(r1_val) << 64; 2726 unsigned __int128 dividend = static_cast<unsigned __int128>(r1_val) << 64;
2727 dividend += static_cast<uint64_t>(r1 + 1); 2727 dividend += get_register(r1 + 1);
2728 uint64_t remainder = dividend % r2_val; 2728 uint64_t remainder = dividend % r2_val;
2729 uint64_t quotient = dividend / r2_val; 2729 uint64_t quotient = dividend / r2_val;
2730 r1_val = remainder; 2730 r1_val = remainder;
2731 set_register(r1, remainder); 2731 set_register(r1, remainder);
2732 set_register(r1 + 1, quotient); 2732 set_register(r1 + 1, quotient);
2733 #else 2733 #else
2734 UNREACHABLE(); 2734 UNREACHABLE();
2735 #endif 2735 #endif
2736 break; 2736 break;
2737 } 2737 }
(...skipping 2301 matching lines...) Expand 10 before | Expand all | Expand 10 after
5039 uintptr_t address = *stack_slot; 5039 uintptr_t address = *stack_slot;
5040 set_register(sp, current_sp + sizeof(uintptr_t)); 5040 set_register(sp, current_sp + sizeof(uintptr_t));
5041 return address; 5041 return address;
5042 } 5042 }
5043 5043
5044 } // namespace internal 5044 } // namespace internal
5045 } // namespace v8 5045 } // namespace v8
5046 5046
5047 #endif // USE_SIMULATOR 5047 #endif // USE_SIMULATOR
5048 #endif // V8_TARGET_ARCH_S390 5048 #endif // V8_TARGET_ARCH_S390
OLDNEW
« no previous file with comments | « src/compiler/s390/code-generator-s390.cc ('k') | no next file » | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698