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Issue 1844473002: S390: Fix CEBR sim to treat operands as floats (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 4 years, 8 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include <stdarg.h> 5 #include <stdarg.h>
6 #include <stdlib.h> 6 #include <stdlib.h>
7 #include <cmath> 7 #include <cmath>
8 8
9 #if V8_TARGET_ARCH_S390 9 #if V8_TARGET_ARCH_S390
10 10
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3399 fr1_val /= fr2_val; 3399 fr1_val /= fr2_val;
3400 set_d_register_from_float32(r1, fr1_val); 3400 set_d_register_from_float32(r1, fr1_val);
3401 SetS390ConditionCode<float>(fr1_val, 0); 3401 SetS390ConditionCode<float>(fr1_val, 0);
3402 } else if (op == CDBR) { 3402 } else if (op == CDBR) {
3403 if (isNaN(r1_val) || isNaN(r2_val)) { 3403 if (isNaN(r1_val) || isNaN(r2_val)) {
3404 condition_reg_ = CC_OF; 3404 condition_reg_ = CC_OF;
3405 } else { 3405 } else {
3406 SetS390ConditionCode<double>(r1_val, r2_val); 3406 SetS390ConditionCode<double>(r1_val, r2_val);
3407 } 3407 }
3408 } else if (op == CEBR) { 3408 } else if (op == CEBR) {
3409 if (isNaN(r1_val) || isNaN(r2_val)) { 3409 if (isNaN(fr1_val) || isNaN(fr2_val)) {
3410 condition_reg_ = CC_OF; 3410 condition_reg_ = CC_OF;
3411 } else { 3411 } else {
3412 SetS390ConditionCode<float>(r1_val, r2_val); 3412 SetS390ConditionCode<float>(fr1_val, fr2_val);
3413 } 3413 }
3414 } else if (op == CDGBR) { 3414 } else if (op == CDGBR) {
3415 int64_t r2_val = get_register(r2); 3415 int64_t r2_val = get_register(r2);
3416 double r1_val = static_cast<double>(r2_val); 3416 double r1_val = static_cast<double>(r2_val);
3417 set_d_register_from_double(r1, r1_val); 3417 set_d_register_from_double(r1, r1_val);
3418 } else if (op == CEGBR) { 3418 } else if (op == CEGBR) {
3419 int64_t fr2_val = get_register(r2); 3419 int64_t fr2_val = get_register(r2);
3420 float fr1_val = static_cast<float>(fr2_val); 3420 float fr1_val = static_cast<float>(fr2_val);
3421 set_d_register_from_float32(r1, fr1_val); 3421 set_d_register_from_float32(r1, fr1_val);
3422 } else if (op == CDFBR) { 3422 } else if (op == CDFBR) {
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5039 uintptr_t address = *stack_slot; 5039 uintptr_t address = *stack_slot;
5040 set_register(sp, current_sp + sizeof(uintptr_t)); 5040 set_register(sp, current_sp + sizeof(uintptr_t));
5041 return address; 5041 return address;
5042 } 5042 }
5043 5043
5044 } // namespace internal 5044 } // namespace internal
5045 } // namespace v8 5045 } // namespace v8
5046 5046
5047 #endif // USE_SIMULATOR 5047 #endif // USE_SIMULATOR
5048 #endif // V8_TARGET_ARCH_S390 5048 #endif // V8_TARGET_ARCH_S390
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