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Unified Diff: src/compiler/mips/code-generator-mips.cc

Issue 1843143002: [turbofan] CodeGenerator: Frame setup refactoring (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 4 years, 8 months ago
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Index: src/compiler/mips/code-generator-mips.cc
diff --git a/src/compiler/mips/code-generator-mips.cc b/src/compiler/mips/code-generator-mips.cc
index 453d553d8c8e28e822a1af9d2edd0dc9f69eb04d..9e85e7db948e335d410419c7cf944b7ff3297ec1 100644
--- a/src/compiler/mips/code-generator-mips.cc
+++ b/src/compiler/mips/code-generator-mips.cc
@@ -477,8 +477,6 @@ void CodeGenerator::AssembleDeconstructFrame() {
__ Pop(ra, fp);
}
-void CodeGenerator::AssembleSetupStackPointer() {}
-
void CodeGenerator::AssembleDeconstructActivationRecord(int stack_param_delta) {
int sp_slot_delta = TailCallFrameStackSlotDelta(stack_param_delta);
if (sp_slot_delta > 0) {
@@ -1627,10 +1625,31 @@ void CodeGenerator::AssembleDeoptimizerCall(
__ Call(deopt_entry, RelocInfo::RUNTIME_ENTRY);
}
+void CodeGenerator::FinishFrame(Frame* frame) {
+ CallDescriptor* descriptor = linkage()->GetIncomingDescriptor();
-void CodeGenerator::AssemblePrologue() {
+ const RegList saves_fpu = descriptor->CalleeSavedFPRegisters();
+ if (saves_fpu != 0) {
+ frame->AlignSavedCalleeRegisterSlots();
+ }
+
+ if (saves_fpu != 0) {
+ int count = base::bits::CountPopulation32(saves_fpu);
+ DCHECK(kNumCalleeSavedFPU == count);
+ frame->AllocateSavedCalleeRegisterSlots(count *
+ (kDoubleSize / kPointerSize));
+ }
+
+ const RegList saves = descriptor->CalleeSavedRegisters();
+ if (saves != 0) {
+ int count = base::bits::CountPopulation32(saves);
+ DCHECK(kNumCalleeSaved == count + 1);
+ frame->AllocateSavedCalleeRegisterSlots(count);
+ }
+}
+
+void CodeGenerator::AssembleConstructFrame() {
CallDescriptor* descriptor = linkage()->GetIncomingDescriptor();
- int stack_shrink_slots = frame()->GetSpillSlotCount();
if (frame_access_state()->has_frame()) {
if (descriptor->IsCFunctionCall()) {
__ Push(ra, fp);
@@ -1642,6 +1661,8 @@ void CodeGenerator::AssemblePrologue() {
}
}
+ int shrink_slots = frame()->GetSpillSlotCount();
+
if (info()->is_osr()) {
// TurboFan OSR-compiled functions cannot be entered directly.
__ Abort(kShouldNotDirectlyEnterOsrFunction);
@@ -1652,35 +1673,24 @@ void CodeGenerator::AssemblePrologue() {
// remaining stack slots.
if (FLAG_code_comments) __ RecordComment("-- OSR entrypoint --");
osr_pc_offset_ = __ pc_offset();
- stack_shrink_slots -= OsrHelper(info()).UnoptimizedFrameSlots();
+ shrink_slots -= OsrHelper(info()).UnoptimizedFrameSlots();
}
const RegList saves_fpu = descriptor->CalleeSavedFPRegisters();
- if (saves_fpu != 0) {
- stack_shrink_slots += frame()->AlignSavedCalleeRegisterSlots();
- }
- if (stack_shrink_slots > 0) {
- __ Subu(sp, sp, Operand(stack_shrink_slots * kPointerSize));
+ if (shrink_slots > 0) {
+ __ Subu(sp, sp, Operand(shrink_slots * kPointerSize));
}
// Save callee-saved FPU registers.
if (saves_fpu != 0) {
__ MultiPushFPU(saves_fpu);
- int count = base::bits::CountPopulation32(saves_fpu);
- DCHECK(kNumCalleeSavedFPU == count);
- frame()->AllocateSavedCalleeRegisterSlots(count *
- (kDoubleSize / kPointerSize));
}
const RegList saves = descriptor->CalleeSavedRegisters();
if (saves != 0) {
// Save callee-saved registers.
__ MultiPush(saves);
- // kNumCalleeSaved includes the fp register, but the fp register
- // is saved separately in TF.
- int count = base::bits::CountPopulation32(saves);
- DCHECK(kNumCalleeSaved == count + 1);
- frame()->AllocateSavedCalleeRegisterSlots(count);
+ DCHECK(kNumCalleeSaved == base::bits::CountPopulation32(saves) + 1);
}
}

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