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Issue 1839813006: S390: Fix Mod64/ModU64 sequence (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 4 years, 8 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 // A Disassembler object is used to disassemble a block of code instruction by 5 // A Disassembler object is used to disassemble a block of code instruction by
6 // instruction. The default implementation of the NameConverter object can be 6 // instruction. The default implementation of the NameConverter object can be
7 // overriden to modify register names or to do symbol lookup on addresses. 7 // overriden to modify register names or to do symbol lookup on addresses.
8 // 8 //
9 // The example below will disassemble a block of code and print it to stdout. 9 // The example below will disassemble a block of code and print it to stdout.
10 // 10 //
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781 case ALGRK: 781 case ALGRK:
782 Format(instr, "algrk\t'r5,'r6,'r3"); 782 Format(instr, "algrk\t'r5,'r6,'r3");
783 break; 783 break;
784 case SLGR: 784 case SLGR:
785 Format(instr, "slgr\t'r5,'r6"); 785 Format(instr, "slgr\t'r5,'r6");
786 break; 786 break;
787 case SLBR: 787 case SLBR:
788 Format(instr, "slbr\t'r5,'r6"); 788 Format(instr, "slbr\t'r5,'r6");
789 break; 789 break;
790 case DLR: 790 case DLR:
791 Format(instr, "dlr\t'r1,'r2"); 791 Format(instr, "dlr\t'r5,'r6");
792 break; 792 break;
793 case DLGR: 793 case DLGR:
794 Format(instr, "dlgr\t'r5,'r6"); 794 Format(instr, "dlgr\t'r5,'r6");
795 break; 795 break;
796 case SLRK: 796 case SLRK:
797 Format(instr, "slrk\t'r5,'r6,'r3"); 797 Format(instr, "slrk\t'r5,'r6,'r3");
798 break; 798 break;
799 case SLGRK: 799 case SLGRK:
800 Format(instr, "slgrk\t'r5,'r6,'r3"); 800 Format(instr, "slgrk\t'r5,'r6,'r3");
801 break; 801 break;
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1402 byte* prev_pc = pc; 1402 byte* prev_pc = pc;
1403 pc += d.InstructionDecode(buffer, pc); 1403 pc += d.InstructionDecode(buffer, pc);
1404 v8::internal::PrintF(f, "%p %08x %s\n", prev_pc, 1404 v8::internal::PrintF(f, "%p %08x %s\n", prev_pc,
1405 *reinterpret_cast<int32_t*>(prev_pc), buffer.start()); 1405 *reinterpret_cast<int32_t*>(prev_pc), buffer.start());
1406 } 1406 }
1407 } 1407 }
1408 1408
1409 } // namespace disasm 1409 } // namespace disasm
1410 1410
1411 #endif // V8_TARGET_ARCH_S390 1411 #endif // V8_TARGET_ARCH_S390
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