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1 //===- subzero/src/IceInstARM32.h - ARM32 machine instructions --*- C++ -*-===// | 1 //===- subzero/src/IceInstARM32.h - ARM32 machine instructions --*- C++ -*-===// |
2 // | 2 // |
3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
4 // | 4 // |
5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
7 // | 7 // |
8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
9 /// | 9 /// |
10 /// \file | 10 /// \file |
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340 /// represent in the native addressing mode, and so it has a separate base | 340 /// represent in the native addressing mode, and so it has a separate base |
341 /// register from SP/FP, where the offset from that base register is then in | 341 /// register from SP/FP, where the offset from that base register is then in |
342 /// range. | 342 /// range. |
343 class StackVariable final : public Variable { | 343 class StackVariable final : public Variable { |
344 StackVariable() = delete; | 344 StackVariable() = delete; |
345 StackVariable(const StackVariable &) = delete; | 345 StackVariable(const StackVariable &) = delete; |
346 StackVariable &operator=(const StackVariable &) = delete; | 346 StackVariable &operator=(const StackVariable &) = delete; |
347 | 347 |
348 public: | 348 public: |
349 static StackVariable *create(Cfg *Func, Type Ty, SizeT Index) { | 349 static StackVariable *create(Cfg *Func, Type Ty, SizeT Index) { |
350 return new (Func->allocate<StackVariable>()) StackVariable(Ty, Index); | 350 return new (Func->allocate<StackVariable>()) StackVariable(Func, Ty, Index); |
351 } | 351 } |
352 constexpr static auto StackVariableKind = | 352 constexpr static auto StackVariableKind = |
353 static_cast<OperandKind>(kVariable_Target); | 353 static_cast<OperandKind>(kVariable_Target); |
354 static bool classof(const Operand *Operand) { | 354 static bool classof(const Operand *Operand) { |
355 return Operand->getKind() == StackVariableKind; | 355 return Operand->getKind() == StackVariableKind; |
356 } | 356 } |
357 void setBaseRegNum(RegNumT RegNum) { BaseRegNum = RegNum; } | 357 void setBaseRegNum(RegNumT RegNum) { BaseRegNum = RegNum; } |
358 RegNumT getBaseRegNum() const override { return BaseRegNum; } | 358 RegNumT getBaseRegNum() const override { return BaseRegNum; } |
359 // Inherit dump() and emit() from Variable. | 359 // Inherit dump() and emit() from Variable. |
360 | 360 |
361 private: | 361 private: |
362 StackVariable(Type Ty, SizeT Index) | 362 StackVariable(const Cfg *Func, Type Ty, SizeT Index) |
363 : Variable(StackVariableKind, Ty, Index) {} | 363 : Variable(Func, StackVariableKind, Ty, Index) {} |
364 RegNumT BaseRegNum; | 364 RegNumT BaseRegNum; |
365 }; | 365 }; |
366 | 366 |
367 /// Base class for ARM instructions. While most ARM instructions can be | 367 /// Base class for ARM instructions. While most ARM instructions can be |
368 /// conditionally executed, a few of them are not predicable (halt, memory | 368 /// conditionally executed, a few of them are not predicable (halt, memory |
369 /// barriers, etc.). | 369 /// barriers, etc.). |
370 class InstARM32 : public InstTarget { | 370 class InstARM32 : public InstTarget { |
371 InstARM32() = delete; | 371 InstARM32() = delete; |
372 InstARM32(const InstARM32 &) = delete; | 372 InstARM32(const InstARM32 &) = delete; |
373 InstARM32 &operator=(const InstARM32 &) = delete; | 373 InstARM32 &operator=(const InstARM32 &) = delete; |
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961 class InstARM32Label : public InstARM32 { | 961 class InstARM32Label : public InstARM32 { |
962 InstARM32Label() = delete; | 962 InstARM32Label() = delete; |
963 InstARM32Label(const InstARM32Label &) = delete; | 963 InstARM32Label(const InstARM32Label &) = delete; |
964 InstARM32Label &operator=(const InstARM32Label &) = delete; | 964 InstARM32Label &operator=(const InstARM32Label &) = delete; |
965 | 965 |
966 public: | 966 public: |
967 static InstARM32Label *create(Cfg *Func, TargetARM32 *Target) { | 967 static InstARM32Label *create(Cfg *Func, TargetARM32 *Target) { |
968 return new (Func->allocate<InstARM32Label>()) InstARM32Label(Func, Target); | 968 return new (Func->allocate<InstARM32Label>()) InstARM32Label(Func, Target); |
969 } | 969 } |
970 uint32_t getEmitInstCount() const override { return 0; } | 970 uint32_t getEmitInstCount() const override { return 0; } |
971 IceString getName(const Cfg *Func) const; | 971 GlobalString getLabelName() const { return Name; } |
972 SizeT getNumber() const { return Number; } | 972 SizeT getNumber() const { return Number; } |
973 void emit(const Cfg *Func) const override; | 973 void emit(const Cfg *Func) const override; |
974 void emitIAS(const Cfg *Func) const override; | 974 void emitIAS(const Cfg *Func) const override; |
975 void dump(const Cfg *Func) const override; | 975 void dump(const Cfg *Func) const override; |
976 void setRelocOffset(RelocOffset *Value) { OffsetReloc = Value; } | 976 void setRelocOffset(RelocOffset *Value) { OffsetReloc = Value; } |
977 | 977 |
978 private: | 978 private: |
979 InstARM32Label(Cfg *Func, TargetARM32 *Target); | 979 InstARM32Label(Cfg *Func, TargetARM32 *Target); |
980 | 980 |
981 RelocOffset *OffsetReloc = nullptr; | 981 RelocOffset *OffsetReloc = nullptr; |
982 | |
983 SizeT Number; // used for unique label generation. | 982 SizeT Number; // used for unique label generation. |
| 983 GlobalString Name; |
984 }; | 984 }; |
985 | 985 |
986 /// Direct branch instruction. | 986 /// Direct branch instruction. |
987 class InstARM32Br : public InstARM32Pred { | 987 class InstARM32Br : public InstARM32Pred { |
988 InstARM32Br() = delete; | 988 InstARM32Br() = delete; |
989 InstARM32Br(const InstARM32Br &) = delete; | 989 InstARM32Br(const InstARM32Br &) = delete; |
990 InstARM32Br &operator=(const InstARM32Br &) = delete; | 990 InstARM32Br &operator=(const InstARM32Br &) = delete; |
991 | 991 |
992 public: | 992 public: |
993 /// Create a conditional branch to one of two nodes. | 993 /// Create a conditional branch to one of two nodes. |
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1523 // violations and link errors. | 1523 // violations and link errors. |
1524 | 1524 |
1525 template <> void InstARM32Ldr::emit(const Cfg *Func) const; | 1525 template <> void InstARM32Ldr::emit(const Cfg *Func) const; |
1526 template <> void InstARM32Movw::emit(const Cfg *Func) const; | 1526 template <> void InstARM32Movw::emit(const Cfg *Func) const; |
1527 template <> void InstARM32Movt::emit(const Cfg *Func) const; | 1527 template <> void InstARM32Movt::emit(const Cfg *Func) const; |
1528 | 1528 |
1529 } // end of namespace ARM32 | 1529 } // end of namespace ARM32 |
1530 } // end of namespace Ice | 1530 } // end of namespace Ice |
1531 | 1531 |
1532 #endif // SUBZERO_SRC_ICEINSTARM32_H | 1532 #endif // SUBZERO_SRC_ICEINSTARM32_H |
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