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Side by Side Diff: src/IceInstARM32.cpp

Issue 1838753002: Subzero: Remove IceString. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Code review changes Created 4 years, 8 months ago
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1 //===- subzero/src/IceInstARM32.cpp - ARM32 instruction implementation ----===// 1 //===- subzero/src/IceInstARM32.cpp - ARM32 instruction implementation ----===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 /// 9 ///
10 /// \file 10 /// \file
(...skipping 609 matching lines...) Expand 10 before | Expand all | Expand 10 after
620 emitUsingTextFixup(Func); 620 emitUsingTextFixup(Func);
621 } 621 }
622 622
623 template <> void InstARM32Vadd::emitIAS(const Cfg *Func) const { 623 template <> void InstARM32Vadd::emitIAS(const Cfg *Func) const {
624 auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>(); 624 auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>();
625 const Variable *Dest = getDest(); 625 const Variable *Dest = getDest();
626 Type DestTy = Dest->getType(); 626 Type DestTy = Dest->getType();
627 switch (DestTy) { 627 switch (DestTy) {
628 default: 628 default:
629 llvm::report_fatal_error("Vadd not defined on type " + 629 llvm::report_fatal_error("Vadd not defined on type " +
630 typeIceString(DestTy)); 630 typeStdString(DestTy));
631 case IceType_v16i8: 631 case IceType_v16i8:
632 case IceType_v8i16: 632 case IceType_v8i16:
633 case IceType_v4i32: 633 case IceType_v4i32:
634 Asm->vaddqi(typeElementType(DestTy), Dest, getSrc(0), getSrc(1)); 634 Asm->vaddqi(typeElementType(DestTy), Dest, getSrc(0), getSrc(1));
635 break; 635 break;
636 case IceType_v4f32: 636 case IceType_v4f32:
637 Asm->vaddqf(Dest, getSrc(0), getSrc(1)); 637 Asm->vaddqf(Dest, getSrc(0), getSrc(1));
638 break; 638 break;
639 case IceType_f32: 639 case IceType_f32:
640 Asm->vadds(Dest, getSrc(0), getSrc(1), CondARM32::AL); 640 Asm->vadds(Dest, getSrc(0), getSrc(1), CondARM32::AL);
641 break; 641 break;
642 case IceType_f64: 642 case IceType_f64:
643 Asm->vaddd(Dest, getSrc(0), getSrc(1), CondARM32::AL); 643 Asm->vaddd(Dest, getSrc(0), getSrc(1), CondARM32::AL);
644 break; 644 break;
645 } 645 }
646 assert(!Asm->needsTextFixup()); 646 assert(!Asm->needsTextFixup());
647 } 647 }
648 648
649 template <> void InstARM32Vand::emitIAS(const Cfg *Func) const { 649 template <> void InstARM32Vand::emitIAS(const Cfg *Func) const {
650 auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>(); 650 auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>();
651 const Variable *Dest = getDest(); 651 const Variable *Dest = getDest();
652 switch (Dest->getType()) { 652 switch (Dest->getType()) {
653 default: 653 default:
654 llvm::report_fatal_error("Vand not defined on type " + 654 llvm::report_fatal_error("Vand not defined on type " +
655 typeIceString(Dest->getType())); 655 typeStdString(Dest->getType()));
656 case IceType_v4i1: 656 case IceType_v4i1:
657 case IceType_v8i1: 657 case IceType_v8i1:
658 case IceType_v16i1: 658 case IceType_v16i1:
659 case IceType_v16i8: 659 case IceType_v16i8:
660 case IceType_v8i16: 660 case IceType_v8i16:
661 case IceType_v4i32: 661 case IceType_v4i32:
662 Asm->vandq(Dest, getSrc(0), getSrc(1)); 662 Asm->vandq(Dest, getSrc(0), getSrc(1));
663 } 663 }
664 assert(!Asm->needsTextFixup()); 664 assert(!Asm->needsTextFixup());
665 } 665 }
(...skipping 70 matching lines...) Expand 10 before | Expand all | Expand 10 after
736 return; 736 return;
737 } 737 }
738 } 738 }
739 739
740 template <> void InstARM32Vorr::emitIAS(const Cfg *Func) const { 740 template <> void InstARM32Vorr::emitIAS(const Cfg *Func) const {
741 auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>(); 741 auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>();
742 const Variable *Dest = getDest(); 742 const Variable *Dest = getDest();
743 switch (Dest->getType()) { 743 switch (Dest->getType()) {
744 default: 744 default:
745 llvm::report_fatal_error("Vorr not defined on type " + 745 llvm::report_fatal_error("Vorr not defined on type " +
746 typeIceString(Dest->getType())); 746 typeStdString(Dest->getType()));
747 case IceType_v4i1: 747 case IceType_v4i1:
748 case IceType_v8i1: 748 case IceType_v8i1:
749 case IceType_v16i1: 749 case IceType_v16i1:
750 case IceType_v16i8: 750 case IceType_v16i8:
751 case IceType_v8i16: 751 case IceType_v8i16:
752 case IceType_v4i32: 752 case IceType_v4i32:
753 Asm->vorrq(Dest, getSrc(0), getSrc(1)); 753 Asm->vorrq(Dest, getSrc(0), getSrc(1));
754 } 754 }
755 assert(!Asm->needsTextFixup()); 755 assert(!Asm->needsTextFixup());
756 } 756 }
757 757
758 template <> void InstARM32Vsub::emitIAS(const Cfg *Func) const { 758 template <> void InstARM32Vsub::emitIAS(const Cfg *Func) const {
759 auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>(); 759 auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>();
760 const Variable *Dest = getDest(); 760 const Variable *Dest = getDest();
761 Type DestTy = Dest->getType(); 761 Type DestTy = Dest->getType();
762 switch (DestTy) { 762 switch (DestTy) {
763 default: 763 default:
764 llvm::report_fatal_error("Vsub not defined on type " + 764 llvm::report_fatal_error("Vsub not defined on type " +
765 typeIceString(DestTy)); 765 typeStdString(DestTy));
766 case IceType_v16i8: 766 case IceType_v16i8:
767 case IceType_v8i16: 767 case IceType_v8i16:
768 case IceType_v4i32: 768 case IceType_v4i32:
769 Asm->vsubqi(typeElementType(DestTy), Dest, getSrc(0), getSrc(1)); 769 Asm->vsubqi(typeElementType(DestTy), Dest, getSrc(0), getSrc(1));
770 break; 770 break;
771 case IceType_v4f32: 771 case IceType_v4f32:
772 Asm->vsubqf(Dest, getSrc(0), getSrc(1)); 772 Asm->vsubqf(Dest, getSrc(0), getSrc(1));
773 break; 773 break;
774 case IceType_f32: 774 case IceType_f32:
775 Asm->vsubs(getDest(), getSrc(0), getSrc(1), CondARM32::AL); 775 Asm->vsubs(getDest(), getSrc(0), getSrc(1), CondARM32::AL);
776 break; 776 break;
777 case IceType_f64: 777 case IceType_f64:
778 Asm->vsubd(getDest(), getSrc(0), getSrc(1), CondARM32::AL); 778 Asm->vsubd(getDest(), getSrc(0), getSrc(1), CondARM32::AL);
779 break; 779 break;
780 } 780 }
781 assert(!Asm->needsTextFixup()); 781 assert(!Asm->needsTextFixup());
782 } 782 }
783 783
784 template <> void InstARM32Vmul::emitIAS(const Cfg *Func) const { 784 template <> void InstARM32Vmul::emitIAS(const Cfg *Func) const {
785 auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>(); 785 auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>();
786 const Variable *Dest = getDest(); 786 const Variable *Dest = getDest();
787 const Type DestTy = Dest->getType(); 787 const Type DestTy = Dest->getType();
788 switch (DestTy) { 788 switch (DestTy) {
789 default: 789 default:
790 llvm::report_fatal_error("Vmul not defined on type " + 790 llvm::report_fatal_error("Vmul not defined on type " +
791 typeIceString(DestTy)); 791 typeStdString(DestTy));
792 792
793 case IceType_v16i8: 793 case IceType_v16i8:
794 case IceType_v8i16: 794 case IceType_v8i16:
795 case IceType_v4i32: 795 case IceType_v4i32:
796 Asm->vmulqi(typeElementType(DestTy), Dest, getSrc(0), getSrc(1)); 796 Asm->vmulqi(typeElementType(DestTy), Dest, getSrc(0), getSrc(1));
797 break; 797 break;
798 case IceType_v4f32: 798 case IceType_v4f32:
799 Asm->vmulqf(Dest, getSrc(0), getSrc(1)); 799 Asm->vmulqf(Dest, getSrc(0), getSrc(1));
800 break; 800 break;
801 case IceType_f32: 801 case IceType_f32:
802 Asm->vmuls(Dest, getSrc(0), getSrc(1), CondARM32::AL); 802 Asm->vmuls(Dest, getSrc(0), getSrc(1), CondARM32::AL);
803 break; 803 break;
804 case IceType_f64: 804 case IceType_f64:
805 Asm->vmuld(Dest, getSrc(0), getSrc(1), CondARM32::AL); 805 Asm->vmuld(Dest, getSrc(0), getSrc(1), CondARM32::AL);
806 break; 806 break;
807 } 807 }
808 } 808 }
809 809
810 InstARM32Call::InstARM32Call(Cfg *Func, Variable *Dest, Operand *CallTarget) 810 InstARM32Call::InstARM32Call(Cfg *Func, Variable *Dest, Operand *CallTarget)
811 : InstARM32(Func, InstARM32::Call, 1, Dest) { 811 : InstARM32(Func, InstARM32::Call, 1, Dest) {
812 HasSideEffects = true; 812 HasSideEffects = true;
813 addSource(CallTarget); 813 addSource(CallTarget);
814 } 814 }
815 815
816 InstARM32Label::InstARM32Label(Cfg *Func, TargetARM32 *Target) 816 InstARM32Label::InstARM32Label(Cfg *Func, TargetARM32 *Target)
817 : InstARM32(Func, InstARM32::Label, 0, nullptr), 817 : InstARM32(Func, InstARM32::Label, 0, nullptr),
818 Number(Target->makeNextLabelNumber()) {} 818 Number(Target->makeNextLabelNumber()) {
819 819 if (BuildDefs::dump()) {
820 IceString InstARM32Label::getName(const Cfg *Func) const { 820 Name = GlobalString::createWithString(
821 if (!BuildDefs::dump()) 821 Func->getContext(),
822 return ""; 822 ".L" + Func->getFunctionName() + "$local$__" + std::to_string(Number));
823 return ".L" + Func->getFunctionName() + "$local$__" + std::to_string(Number); 823 } else {
824 Name = GlobalString::createWithoutString(Func->getContext());
825 }
824 } 826 }
825 827
826 namespace { 828 namespace {
827 // Requirements for Push/Pop: 829 // Requirements for Push/Pop:
828 // 1) All the Variables have the same type; 830 // 1) All the Variables have the same type;
829 // 2) All the variables have registers assigned to them. 831 // 2) All the variables have registers assigned to them.
830 void validatePushOrPopRegisterListOrDie(const VarList &RegList) { 832 void validatePushOrPopRegisterListOrDie(const VarList &RegList) {
831 Type PreviousTy = IceType_void; 833 Type PreviousTy = IceType_void;
832 for (Variable *Reg : RegList) { 834 for (Variable *Reg : RegList) {
833 if (PreviousTy != IceType_void && Reg->getType() != PreviousTy) { 835 if (PreviousTy != IceType_void && Reg->getType() != PreviousTy) {
(...skipping 741 matching lines...) Expand 10 before | Expand all | Expand 10 after
1575 case IceType_v4f32: 1577 case IceType_v4f32:
1576 assert(CondARM32::isUnconditional(Cond) && 1578 assert(CondARM32::isUnconditional(Cond) &&
1577 "Moves on <4 x f32> must be unconditional!"); 1579 "Moves on <4 x f32> must be unconditional!");
1578 // Mov between different Src and Dest types is used for bitcasting vectors. 1580 // Mov between different Src and Dest types is used for bitcasting vectors.
1579 // We still want to make sure SrcTy is a vector type. 1581 // We still want to make sure SrcTy is a vector type.
1580 assert(isVectorType(SrcTy) && "Mov between vector and scalar."); 1582 assert(isVectorType(SrcTy) && "Mov between vector and scalar.");
1581 Asm->vorrq(Dest, Src0, Src0); 1583 Asm->vorrq(Dest, Src0, Src0);
1582 return; 1584 return;
1583 } 1585 }
1584 llvm::report_fatal_error("Mov: don't know how to move " + 1586 llvm::report_fatal_error("Mov: don't know how to move " +
1585 typeIceString(SrcTy) + " to " + 1587 typeStdString(SrcTy) + " to " +
1586 typeIceString(DestTy)); 1588 typeStdString(DestTy));
1587 } 1589 }
1588 1590
1589 void InstARM32Mov::dump(const Cfg *Func) const { 1591 void InstARM32Mov::dump(const Cfg *Func) const {
1590 if (!BuildDefs::dump()) 1592 if (!BuildDefs::dump())
1591 return; 1593 return;
1592 assert(getSrcSize() == 1 || getSrcSize() == 2); 1594 assert(getSrcSize() == 1 || getSrcSize() == 2);
1593 Ostream &Str = Func->getContext()->getStrDump(); 1595 Ostream &Str = Func->getContext()->getStrDump();
1594 Variable *Dest = getDest(); 1596 Variable *Dest = getDest();
1595 Variable *DestHi = getDestHi(); 1597 Variable *DestHi = getDestHi();
1596 Dest->dump(Func); 1598 Dest->dump(Func);
1597 if (DestHi) { 1599 if (DestHi) {
1598 Str << ", "; 1600 Str << ", ";
1599 DestHi->dump(Func); 1601 DestHi->dump(Func);
1600 } 1602 }
1601 1603
1602 dumpOpcodePred(Str, " = mov", getDest()->getType()); 1604 dumpOpcodePred(Str, " = mov", getDest()->getType());
1603 Str << " "; 1605 Str << " ";
1604 1606
1605 dumpSources(Func); 1607 dumpSources(Func);
1606 } 1608 }
1607 1609
1608 void InstARM32Br::emit(const Cfg *Func) const { 1610 void InstARM32Br::emit(const Cfg *Func) const {
1609 if (!BuildDefs::dump()) 1611 if (!BuildDefs::dump())
1610 return; 1612 return;
1611 Ostream &Str = Func->getContext()->getStrEmit(); 1613 Ostream &Str = Func->getContext()->getStrEmit();
1612 Str << "\t" 1614 Str << "\t"
1613 "b" << getPredicate() << "\t"; 1615 "b" << getPredicate() << "\t";
1614 if (Label) { 1616 if (Label) {
1615 Str << Label->getName(Func); 1617 Str << Label->getLabelName();
1616 } else { 1618 } else {
1617 if (isUnconditionalBranch()) { 1619 if (isUnconditionalBranch()) {
1618 Str << getTargetFalse()->getAsmName(); 1620 Str << getTargetFalse()->getAsmName();
1619 } else { 1621 } else {
1620 Str << getTargetTrue()->getAsmName(); 1622 Str << getTargetTrue()->getAsmName();
1621 if (getTargetFalse()) { 1623 if (getTargetFalse()) {
1622 startNextInst(Func); 1624 startNextInst(Func);
1623 Str << "\n\t" 1625 Str << "\n\t"
1624 << "b" 1626 << "b"
1625 << "\t" << getTargetFalse()->getAsmName(); 1627 << "\t" << getTargetFalse()->getAsmName();
(...skipping 19 matching lines...) Expand all
1645 emitUsingTextFixup(Func); 1647 emitUsingTextFixup(Func);
1646 } 1648 }
1647 1649
1648 void InstARM32Br::dump(const Cfg *Func) const { 1650 void InstARM32Br::dump(const Cfg *Func) const {
1649 if (!BuildDefs::dump()) 1651 if (!BuildDefs::dump())
1650 return; 1652 return;
1651 Ostream &Str = Func->getContext()->getStrDump(); 1653 Ostream &Str = Func->getContext()->getStrDump();
1652 Str << "br "; 1654 Str << "br ";
1653 1655
1654 if (getPredicate() == CondARM32::AL) { 1656 if (getPredicate() == CondARM32::AL) {
1655 Str << "label %" 1657 if (Label) {
1656 << (Label ? Label->getName(Func) : getTargetFalse()->getName()); 1658 Str << "label %" << Label->getLabelName();
1659 } else {
1660 Str << "label %" << getTargetFalse()->getName();
1661 }
1657 return; 1662 return;
1658 } 1663 }
1659 1664
1660 if (Label) { 1665 if (Label) {
1661 Str << getPredicate() << ", label %" << Label->getName(Func); 1666 Str << getPredicate() << ", label %" << Label->getLabelName();
1662 } else { 1667 } else {
1663 Str << getPredicate() << ", label %" << getTargetTrue()->getName(); 1668 Str << getPredicate() << ", label %" << getTargetTrue()->getName();
1664 if (getTargetFalse()) { 1669 if (getTargetFalse()) {
1665 Str << ", label %" << getTargetFalse()->getName(); 1670 Str << ", label %" << getTargetFalse()->getName();
1666 } 1671 }
1667 } 1672 }
1668 } 1673 }
1669 1674
1670 void InstARM32Call::emit(const Cfg *Func) const { 1675 void InstARM32Call::emit(const Cfg *Func) const {
1671 if (!BuildDefs::dump()) 1676 if (!BuildDefs::dump())
(...skipping 52 matching lines...) Expand 10 before | Expand all | Expand 10 after
1724 } 1729 }
1725 1730
1726 void InstARM32Label::emit(const Cfg *Func) const { 1731 void InstARM32Label::emit(const Cfg *Func) const {
1727 if (!BuildDefs::dump()) 1732 if (!BuildDefs::dump())
1728 return; 1733 return;
1729 // A label is not really an instruction. Hence, we need to fix the 1734 // A label is not really an instruction. Hence, we need to fix the
1730 // emitted text size. 1735 // emitted text size.
1731 if (auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>()) 1736 if (auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>())
1732 Asm->decEmitTextSize(InstSize); 1737 Asm->decEmitTextSize(InstSize);
1733 Ostream &Str = Func->getContext()->getStrEmit(); 1738 Ostream &Str = Func->getContext()->getStrEmit();
1734 Str << getName(Func) << ":"; 1739 Str << getLabelName() << ":";
1735 } 1740 }
1736 1741
1737 void InstARM32Label::emitIAS(const Cfg *Func) const { 1742 void InstARM32Label::emitIAS(const Cfg *Func) const {
1738 auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>(); 1743 auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>();
1739 Asm->bindLocalLabel(Func, this, Number); 1744 Asm->bindLocalLabel(Func, this, Number);
1740 if (OffsetReloc != nullptr) { 1745 if (OffsetReloc != nullptr) {
1741 Asm->bindRelocOffset(OffsetReloc); 1746 Asm->bindRelocOffset(OffsetReloc);
1742 } 1747 }
1743 if (Asm->needsTextFixup()) 1748 if (Asm->needsTextFixup())
1744 emitUsingTextFixup(Func); 1749 emitUsingTextFixup(Func);
1745 } 1750 }
1746 1751
1747 void InstARM32Label::dump(const Cfg *Func) const { 1752 void InstARM32Label::dump(const Cfg *Func) const {
1748 if (!BuildDefs::dump()) 1753 if (!BuildDefs::dump())
1749 return; 1754 return;
1750 Ostream &Str = Func->getContext()->getStrDump(); 1755 Ostream &Str = Func->getContext()->getStrDump();
1751 Str << getName(Func) << ":"; 1756 Str << getLabelName() << ":";
1752 } 1757 }
1753 1758
1754 template <InstARM32::InstKindARM32 K> 1759 template <InstARM32::InstKindARM32 K>
1755 void InstARM32LoadBase<K>::emitIAS(const Cfg *Func) const { 1760 void InstARM32LoadBase<K>::emitIAS(const Cfg *Func) const {
1756 emitUsingTextFixup(Func); 1761 emitUsingTextFixup(Func);
1757 } 1762 }
1758 1763
1759 template <> void InstARM32Ldr::emit(const Cfg *Func) const { 1764 template <> void InstARM32Ldr::emit(const Cfg *Func) const {
1760 if (!BuildDefs::dump()) 1765 if (!BuildDefs::dump())
1761 return; 1766 return;
(...skipping 22 matching lines...) Expand all
1784 getSrc(0)->emit(Func); 1789 getSrc(0)->emit(Func);
1785 } 1790 }
1786 1791
1787 template <> void InstARM32Ldr::emitIAS(const Cfg *Func) const { 1792 template <> void InstARM32Ldr::emitIAS(const Cfg *Func) const {
1788 assert(getSrcSize() == 1); 1793 assert(getSrcSize() == 1);
1789 auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>(); 1794 auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>();
1790 Variable *Dest = getDest(); 1795 Variable *Dest = getDest();
1791 const Type DestTy = Dest->getType(); 1796 const Type DestTy = Dest->getType();
1792 switch (DestTy) { 1797 switch (DestTy) {
1793 default: 1798 default:
1794 llvm::report_fatal_error("Ldr on unknown type: " + typeIceString(DestTy)); 1799 llvm::report_fatal_error("Ldr on unknown type: " + typeStdString(DestTy));
1795 case IceType_i1: 1800 case IceType_i1:
1796 case IceType_i8: 1801 case IceType_i8:
1797 case IceType_i16: 1802 case IceType_i16:
1798 case IceType_i32: 1803 case IceType_i32:
1799 case IceType_i64: 1804 case IceType_i64:
1800 Asm->ldr(Dest, getSrc(0), getPredicate(), Func->getTarget()); 1805 Asm->ldr(Dest, getSrc(0), getPredicate(), Func->getTarget());
1801 break; 1806 break;
1802 case IceType_f32: 1807 case IceType_f32:
1803 Asm->vldrs(Dest, getSrc(0), getPredicate(), Func->getTarget()); 1808 Asm->vldrs(Dest, getSrc(0), getPredicate(), Func->getTarget());
1804 break; 1809 break;
(...skipping 327 matching lines...) Expand 10 before | Expand all | Expand 10 after
2132 } 2137 }
2133 2138
2134 void InstARM32Str::emitIAS(const Cfg *Func) const { 2139 void InstARM32Str::emitIAS(const Cfg *Func) const {
2135 assert(getSrcSize() == 2); 2140 assert(getSrcSize() == 2);
2136 auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>(); 2141 auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>();
2137 const Operand *Src0 = getSrc(0); 2142 const Operand *Src0 = getSrc(0);
2138 const Operand *Src1 = getSrc(1); 2143 const Operand *Src1 = getSrc(1);
2139 Type Ty = Src0->getType(); 2144 Type Ty = Src0->getType();
2140 switch (Ty) { 2145 switch (Ty) {
2141 default: 2146 default:
2142 llvm::report_fatal_error("Str on unknown type: " + typeIceString(Ty)); 2147 llvm::report_fatal_error("Str on unknown type: " + typeStdString(Ty));
2143 case IceType_i1: 2148 case IceType_i1:
2144 case IceType_i8: 2149 case IceType_i8:
2145 case IceType_i16: 2150 case IceType_i16:
2146 case IceType_i32: 2151 case IceType_i32:
2147 case IceType_i64: 2152 case IceType_i64:
2148 Asm->str(Src0, Src1, getPredicate(), Func->getTarget()); 2153 Asm->str(Src0, Src1, getPredicate(), Func->getTarget());
2149 break; 2154 break;
2150 case IceType_f32: 2155 case IceType_f32:
2151 Asm->vstrs(Src0, Src1, getPredicate(), Func->getTarget()); 2156 Asm->vstrs(Src0, Src1, getPredicate(), Func->getTarget());
2152 break; 2157 break;
(...skipping 309 matching lines...) Expand 10 before | Expand all | Expand 10 after
2462 getSrc(0)->emit(Func); 2467 getSrc(0)->emit(Func);
2463 } 2468 }
2464 2469
2465 void InstARM32Vabs::emitIAS(const Cfg *Func) const { 2470 void InstARM32Vabs::emitIAS(const Cfg *Func) const {
2466 assert(getSrcSize() == 1); 2471 assert(getSrcSize() == 1);
2467 auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>(); 2472 auto *Asm = Func->getAssembler<ARM32::AssemblerARM32>();
2468 const Variable *Dest = getDest(); 2473 const Variable *Dest = getDest();
2469 switch (Dest->getType()) { 2474 switch (Dest->getType()) {
2470 default: 2475 default:
2471 llvm::report_fatal_error("fabs not defined on type " + 2476 llvm::report_fatal_error("fabs not defined on type " +
2472 typeIceString(Dest->getType())); 2477 typeStdString(Dest->getType()));
2473 case IceType_f32: 2478 case IceType_f32:
2474 Asm->vabss(Dest, getSrc(0), getPredicate()); 2479 Asm->vabss(Dest, getSrc(0), getPredicate());
2475 break; 2480 break;
2476 case IceType_f64: 2481 case IceType_f64:
2477 Asm->vabsd(Dest, getSrc(0), getPredicate()); 2482 Asm->vabsd(Dest, getSrc(0), getPredicate());
2478 break; 2483 break;
2479 case IceType_v4f32: 2484 case IceType_v4f32:
2480 assert(CondARM32::isUnconditional(getPredicate()) && 2485 assert(CondARM32::isUnconditional(getPredicate()) &&
2481 "fabs must be unconditional"); 2486 "fabs must be unconditional");
2482 Asm->vabsq(Dest, getSrc(0)); 2487 Asm->vabsq(Dest, getSrc(0));
(...skipping 299 matching lines...) Expand 10 before | Expand all | Expand 10 after
2782 2787
2783 template class InstARM32FourAddrGPR<InstARM32::Mla>; 2788 template class InstARM32FourAddrGPR<InstARM32::Mla>;
2784 template class InstARM32FourAddrGPR<InstARM32::Mls>; 2789 template class InstARM32FourAddrGPR<InstARM32::Mls>;
2785 2790
2786 template class InstARM32CmpLike<InstARM32::Cmn>; 2791 template class InstARM32CmpLike<InstARM32::Cmn>;
2787 template class InstARM32CmpLike<InstARM32::Cmp>; 2792 template class InstARM32CmpLike<InstARM32::Cmp>;
2788 template class InstARM32CmpLike<InstARM32::Tst>; 2793 template class InstARM32CmpLike<InstARM32::Tst>;
2789 2794
2790 } // end of namespace ARM32 2795 } // end of namespace ARM32
2791 } // end of namespace Ice 2796 } // end of namespace Ice
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