Subzero: Remove IceString.

src/IceAssemblerARM32.cpp

 //===- subzero/src/IceAssemblerARM32.cpp - Assembler for ARM32 --*- C++ -*-===//
 //
 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 //
 // Modified by the Subzero authors.
 //
 //===----------------------------------------------------------------------===//
 //
@@ skipping 575 matching lines @@
 namespace ARM32 {
 
 size_t MoveRelocatableFixup::emit(GlobalContext *Ctx,
                                   const Assembler &Asm) const {
   if (!BuildDefs::dump())
     return InstARM32::InstSize;
   Ostream &Str = Ctx->getStrEmit();
   IValueT Inst = Asm.load<IValueT>(position());
   const bool IsMovw = kind() == llvm::ELF::R_ARM_MOVW_ABS_NC ||
                       kind() == llvm::ELF::R_ARM_MOVW_PREL_NC;
-  const IceString Symbol = symbol();
+  const auto Symbol = symbol().toString();
   const bool NeedsPCRelSuffix =
       (Asm.fixupIsPCRel(kind()) || Symbol == GlobalOffsetTable);
   Str << "\t"
          "mov" << (IsMovw ? "w" : "t") << "\t"
       << RegARM32::getRegName(RegNumT::fixme((Inst >> kRdShift) & 0xF))
       << ", #:" << (IsMovw ? "lower" : "upper") << "16:" << Symbol
       << (NeedsPCRelSuffix ? " - ." : "") << "\t@ .word "
       // TODO(jpp): This is broken, it also needs to add a magic constant.
       << llvm::format_hex_no_prefix(Inst, 8) << "\n";
   return InstARM32::InstSize;
 }
 
 IValueT AssemblerARM32::encodeElmtType(Type ElmtTy) {
   switch (ElmtTy) {
   case IceType_i8:
     return 0;
   case IceType_i16:
     return 1;
   case IceType_i32:
   case IceType_f32:
     return 2;
   case IceType_i64:
     return 3;
   default:
     llvm::report_fatal_error("SIMD op: Don't understand element type " +
-                             typeIceString(ElmtTy));
+                             typeStdString(ElmtTy));
   }
 }
 
 // This fixup points to an ARM32 instruction with the following format:
 void MoveRelocatableFixup::emitOffset(Assembler *Asm) const {
   // cccc00110T00iiiiddddiiiiiiiiiiii where cccc=Cond, dddd=Rd,
   // iiiiiiiiiiiiiiii = Imm16, and T=1 for movt.
 
   const IValueT Inst = Asm->load<IValueT>(position());
   constexpr IValueT Imm16Mask = 0x000F0FFF;
@@ skipping 402 matching lines @@
   assert(Rt != RegARM32::Encoded_Reg_pc);
   assert(Rt != RegARM32::Encoded_Reg_sp);
   assert(CondARM32::isDefined(Cond));
   const uint32_t BitSize = typeWidthInBytes(OpRt->getType()) * CHAR_BIT;
   IValueT Opcode1 = 0;
   IValueT Opcode2 = 0;
   switch (BitSize) {
   default:
     llvm::report_fatal_error(std::string(InstName) +
                              ": Unable to process type " +
-                             typeIceString(OpRt->getType()));
+                             typeStdString(OpRt->getType()));
   case 8:
     assert(Index < 16);
     Dn = Dn | mask(Index, 3, 1);
     Opcode1 = B1 | mask(Index, 2, 1);
     Opcode2 = mask(Index, 0, 2);
     break;
   case 16:
     assert(Index < 8);
     Dn = Dn | mask(Index, 2, 1);
     Opcode1 = mask(Index, 1, 1);
@@ skipping 2145 matching lines @@
   constexpr const char *Vsqrts = "vsqrts";
   IValueT Sd = encodeSRegister(OpSd, "Sd", Vsqrts);
   IValueT Sm = encodeSRegister(OpSm, "Sm", Vsqrts);
   constexpr IValueT VsqrtsOpcode = B23 | B21 | B20 | B16 | B7 | B6;
   constexpr IValueT S0 = 0;
   emitVFPsss(Cond, VsqrtsOpcode, Sd, S0, Sm);
 }
 
 } // end of namespace ARM32
 } // end of namespace Ice