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1 //===- subzero/src/IceTargetLoweringARM32.h - ARM32 lowering ----*- C++ -*-===// | 1 //===- subzero/src/IceTargetLoweringARM32.h - ARM32 lowering ----*- C++ -*-===// |
2 // | 2 // |
3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
4 // | 4 // |
5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
7 // | 7 // |
8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
9 /// | 9 /// |
10 /// \file | 10 /// \file |
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51 }; | 51 }; |
52 | 52 |
53 // The target lowering logic for ARM32. | 53 // The target lowering logic for ARM32. |
54 class TargetARM32 : public TargetLowering { | 54 class TargetARM32 : public TargetLowering { |
55 TargetARM32() = delete; | 55 TargetARM32() = delete; |
56 TargetARM32(const TargetARM32 &) = delete; | 56 TargetARM32(const TargetARM32 &) = delete; |
57 TargetARM32 &operator=(const TargetARM32 &) = delete; | 57 TargetARM32 &operator=(const TargetARM32 &) = delete; |
58 | 58 |
59 public: | 59 public: |
60 static void staticInit(GlobalContext *Ctx); | 60 static void staticInit(GlobalContext *Ctx); |
| 61 |
| 62 static bool shouldBePooled(const Constant *C) { |
| 63 if (auto *ConstDouble = llvm::dyn_cast<ConstantDouble>(C)) { |
| 64 return !Utils::isPositiveZero(ConstDouble->getValue()); |
| 65 } |
| 66 if (llvm::isa<ConstantFloat>(C)) |
| 67 return true; |
| 68 return false; |
| 69 } |
| 70 |
61 // TODO(jvoung): return a unique_ptr. | 71 // TODO(jvoung): return a unique_ptr. |
62 static std::unique_ptr<::Ice::TargetLowering> create(Cfg *Func) { | 72 static std::unique_ptr<::Ice::TargetLowering> create(Cfg *Func) { |
63 return makeUnique<TargetARM32>(Func); | 73 return makeUnique<TargetARM32>(Func); |
64 } | 74 } |
65 | 75 |
66 std::unique_ptr<::Ice::Assembler> createAssembler() const override { | 76 std::unique_ptr<::Ice::Assembler> createAssembler() const override { |
67 const bool IsNonsfi = SandboxingType == ST_Nonsfi; | 77 const bool IsNonsfi = SandboxingType == ST_Nonsfi; |
68 return makeUnique<ARM32::AssemblerARM32>(IsNonsfi); | 78 return makeUnique<ARM32::AssemblerARM32>(IsNonsfi); |
69 } | 79 } |
70 | 80 |
71 void initNodeForLowering(CfgNode *Node) override { | 81 void initNodeForLowering(CfgNode *Node) override { |
72 Computations.forgetProducers(); | 82 Computations.forgetProducers(); |
73 Computations.recordProducers(Node); | 83 Computations.recordProducers(Node); |
74 Computations.dump(Func); | 84 Computations.dump(Func); |
75 } | 85 } |
76 | 86 |
77 void translateOm1() override; | 87 void translateOm1() override; |
78 void translateO2() override; | 88 void translateO2() override; |
79 bool doBranchOpt(Inst *I, const CfgNode *NextNode) override; | 89 bool doBranchOpt(Inst *I, const CfgNode *NextNode) override; |
80 | 90 |
81 SizeT getNumRegisters() const override { return RegARM32::Reg_NUM; } | 91 SizeT getNumRegisters() const override { return RegARM32::Reg_NUM; } |
82 Variable *getPhysicalRegister(RegNumT RegNum, | 92 Variable *getPhysicalRegister(RegNumT RegNum, |
83 Type Ty = IceType_void) override; | 93 Type Ty = IceType_void) override; |
84 IceString getRegName(RegNumT RegNum, Type Ty) const override; | 94 const char *getRegName(RegNumT RegNum, Type Ty) const override; |
85 SmallBitVector getRegisterSet(RegSetMask Include, | 95 SmallBitVector getRegisterSet(RegSetMask Include, |
86 RegSetMask Exclude) const override; | 96 RegSetMask Exclude) const override; |
87 const SmallBitVector & | 97 const SmallBitVector & |
88 getRegistersForVariable(const Variable *Var) const override { | 98 getRegistersForVariable(const Variable *Var) const override { |
89 RegClass RC = Var->getRegClass(); | 99 RegClass RC = Var->getRegClass(); |
90 switch (RC) { | 100 switch (RC) { |
91 default: | 101 default: |
92 assert(RC < RC_Target); | 102 assert(RC < RC_Target); |
93 return TypeToRegisterSet[RC]; | 103 return TypeToRegisterSet[RC]; |
94 case RegARM32::RCARM32_QtoS: | 104 case RegARM32::RCARM32_QtoS: |
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907 Variable *GotPtr = nullptr; | 917 Variable *GotPtr = nullptr; |
908 // TODO(jpp): use CfgLocalAllocator. | 918 // TODO(jpp): use CfgLocalAllocator. |
909 /// @} | 919 /// @} |
910 | 920 |
911 /// Manages the Gotoff relocations created during the function lowering. A | 921 /// Manages the Gotoff relocations created during the function lowering. A |
912 /// single Gotoff relocation is created for each global variable used by the | 922 /// single Gotoff relocation is created for each global variable used by the |
913 /// function being lowered. | 923 /// function being lowered. |
914 /// @{ | 924 /// @{ |
915 // TODO(jpp): if the same global G is used in different functions, then this | 925 // TODO(jpp): if the same global G is used in different functions, then this |
916 // method will emit one G(gotoff) relocation per function. | 926 // method will emit one G(gotoff) relocation per function. |
917 IceString createGotoffRelocation(const ConstantRelocatable *CR); | 927 GlobalString createGotoffRelocation(const ConstantRelocatable *CR); |
918 CfgUnorderedSet<IceString> KnownGotoffs; | 928 CfgUnorderedSet<GlobalString> KnownGotoffs; |
919 /// @} | 929 /// @} |
920 | 930 |
921 /// Loads the constant relocatable Name to Register. Then invoke Finish to | 931 /// Loads the constant relocatable Name to Register. Then invoke Finish to |
922 /// finish the relocatable lowering. Finish **must** use PC in its first | 932 /// finish the relocatable lowering. Finish **must** use PC in its first |
923 /// emitted instruction, or the relocatable in Register will contain the wrong | 933 /// emitted instruction, or the relocatable in Register will contain the wrong |
924 /// value. | 934 /// value. |
925 // | 935 // |
926 // Lowered sequence: | 936 // Lowered sequence: |
927 // | 937 // |
928 // Movw: | 938 // Movw: |
929 // movw Register, #:lower16:Name - (End - Movw) - 8 . | 939 // movw Register, #:lower16:Name - (End - Movw) - 8 . |
930 // Movt: | 940 // Movt: |
931 // movt Register, #:upper16:Name - (End - Movt) - 8 . | 941 // movt Register, #:upper16:Name - (End - Movt) - 8 . |
932 // PC = fake-def | 942 // PC = fake-def |
933 // End: | 943 // End: |
934 // Finish(PC) | 944 // Finish(PC) |
935 // | 945 // |
936 // The -8 in movw/movt above is to account for the PC value that the first | 946 // The -8 in movw/movt above is to account for the PC value that the first |
937 // instruction emitted by Finish(PC) will read. | 947 // instruction emitted by Finish(PC) will read. |
938 void | 948 void |
939 loadNamedConstantRelocatablePIC(const IceString &Name, Variable *Register, | 949 loadNamedConstantRelocatablePIC(GlobalString Name, Variable *Register, |
940 std::function<void(Variable *PC)> Finish); | 950 std::function<void(Variable *PC)> Finish); |
941 | 951 |
942 /// Sandboxer defines methods for ensuring that "dangerous" operations are | 952 /// Sandboxer defines methods for ensuring that "dangerous" operations are |
943 /// masked during sandboxed code emission. For regular, non-sandboxed code | 953 /// masked during sandboxed code emission. For regular, non-sandboxed code |
944 /// emission, its methods are simple pass-through methods. | 954 /// emission, its methods are simple pass-through methods. |
945 /// | 955 /// |
946 /// The Sandboxer also emits BundleLock/BundleUnlock pseudo-instructions | 956 /// The Sandboxer also emits BundleLock/BundleUnlock pseudo-instructions |
947 /// in the constructor/destructor during sandboxed code emission. Therefore, | 957 /// in the constructor/destructor during sandboxed code emission. Therefore, |
948 /// it is a bad idea to create an object of this type and "keep it around." | 958 /// it is a bad idea to create an object of this type and "keep it around." |
949 /// The recommended usage is: | 959 /// The recommended usage is: |
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1289 TargetDataARM32() = delete; | 1299 TargetDataARM32() = delete; |
1290 TargetDataARM32(const TargetDataARM32 &) = delete; | 1300 TargetDataARM32(const TargetDataARM32 &) = delete; |
1291 TargetDataARM32 &operator=(const TargetDataARM32 &) = delete; | 1301 TargetDataARM32 &operator=(const TargetDataARM32 &) = delete; |
1292 | 1302 |
1293 public: | 1303 public: |
1294 static std::unique_ptr<TargetDataLowering> create(GlobalContext *Ctx) { | 1304 static std::unique_ptr<TargetDataLowering> create(GlobalContext *Ctx) { |
1295 return std::unique_ptr<TargetDataLowering>(new TargetDataARM32(Ctx)); | 1305 return std::unique_ptr<TargetDataLowering>(new TargetDataARM32(Ctx)); |
1296 } | 1306 } |
1297 | 1307 |
1298 void lowerGlobals(const VariableDeclarationList &Vars, | 1308 void lowerGlobals(const VariableDeclarationList &Vars, |
1299 const IceString &SectionSuffix) override; | 1309 const std::string &SectionSuffix) override; |
1300 void lowerConstants() override; | 1310 void lowerConstants() override; |
1301 void lowerJumpTables() override; | 1311 void lowerJumpTables() override; |
1302 | 1312 |
1303 protected: | 1313 protected: |
1304 explicit TargetDataARM32(GlobalContext *Ctx); | 1314 explicit TargetDataARM32(GlobalContext *Ctx); |
1305 | 1315 |
1306 private: | 1316 private: |
1307 ~TargetDataARM32() override = default; | 1317 ~TargetDataARM32() override = default; |
1308 }; | 1318 }; |
1309 | 1319 |
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1325 private: | 1335 private: |
1326 ~TargetHeaderARM32() = default; | 1336 ~TargetHeaderARM32() = default; |
1327 | 1337 |
1328 TargetARM32Features CPUFeatures; | 1338 TargetARM32Features CPUFeatures; |
1329 }; | 1339 }; |
1330 | 1340 |
1331 } // end of namespace ARM32 | 1341 } // end of namespace ARM32 |
1332 } // end of namespace Ice | 1342 } // end of namespace Ice |
1333 | 1343 |
1334 #endif // SUBZERO_SRC_ICETARGETLOWERINGARM32_H | 1344 #endif // SUBZERO_SRC_ICETARGETLOWERINGARM32_H |
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