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| 1 //===- subzero/src/IceRegistersARM32.h - Register information ---*- C++ -*-===// | 1 //===- subzero/src/IceRegistersARM32.h - Register information ---*- C++ -*-===// |
| 2 // | 2 // |
| 3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
| 4 // | 4 // |
| 5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
| 6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
| 7 // | 7 // |
| 8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
| 9 /// | 9 /// |
| 10 /// \file | 10 /// \file |
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| 200 static inline bool isEncodedQReg(RegNumT RegNum) { | 200 static inline bool isEncodedQReg(RegNumT RegNum) { |
| 201 RegNum.assertIsValid(); | 201 RegNum.assertIsValid(); |
| 202 return RegTable[RegNum].IsVec128; | 202 return RegTable[RegNum].IsVec128; |
| 203 } | 203 } |
| 204 | 204 |
| 205 static inline QRegister getEncodedQReg(RegNumT RegNum) { | 205 static inline QRegister getEncodedQReg(RegNumT RegNum) { |
| 206 assert(isEncodedQReg(RegNum)); | 206 assert(isEncodedQReg(RegNum)); |
| 207 return QRegister(RegTable[RegNum].Encoding); | 207 return QRegister(RegTable[RegNum].Encoding); |
| 208 } | 208 } |
| 209 | 209 |
| 210 static inline IceString getRegName(RegNumT RegNum) { | 210 static inline const char *getRegName(RegNumT RegNum) { |
| 211 RegNum.assertIsValid(); | 211 RegNum.assertIsValid(); |
| 212 return RegTable[RegNum].Name; | 212 return RegTable[RegNum].Name; |
| 213 } | 213 } |
| 214 | 214 |
| 215 // Extend enum RegClass with ARM32-specific register classes. | 215 // Extend enum RegClass with ARM32-specific register classes. |
| 216 enum RegClassARM32 : uint8_t { | 216 enum RegClassARM32 : uint8_t { |
| 217 RCARM32_QtoS = RC_Target, // Denotes Q registers that are aliased by S | 217 RCARM32_QtoS = RC_Target, // Denotes Q registers that are aliased by S |
| 218 // registers. | 218 // registers. |
| 219 RCARM32_NUM | 219 RCARM32_NUM |
| 220 }; | 220 }; |
| 221 | 221 |
| 222 } // end of namespace RegARM32 | 222 } // end of namespace RegARM32 |
| 223 } // end of namespace ARM32 | 223 } // end of namespace ARM32 |
| 224 } // end of namespace Ice | 224 } // end of namespace Ice |
| 225 | 225 |
| 226 #endif // SUBZERO_SRC_ICEREGISTERSARM32_H | 226 #endif // SUBZERO_SRC_ICEREGISTERSARM32_H |
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