Initial Subzero WASM prototype.

src/IceOperand.h

 //===- subzero/src/IceOperand.h - High-level operands -----------*- C++ -*-===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 76 matching lines @@
     dump(Func, Func->getContext()->getStrDump());
   }
   void dump(Ostream &Str) const {
     if (BuildDefs::dump())
       dump(nullptr, Str);
   }
   /// @}
 
   virtual ~Operand() = default;
 
+  CfgNode *getDefNode() const { return DefNode; }
+
+  void setDefNode(CfgNode *node) { this->DefNode = node; }
+
 protected:
   Operand(OperandKind Kind, Type Ty) : Ty(Ty), Kind(Kind) {
     // It is undefined behavior to have a larger value in the enum
     assert(Kind <= kTarget_Max);
   }
 
   const Type Ty;
   const OperandKind Kind;
   /// Vars and NumVars are initialized by the derived class.
   SizeT NumVars = 0;
   Variable **Vars = nullptr;
+
+  CfgNode *DefNode = nullptr;
 };
 
 template <class StreamType>
 inline StreamType &operator<<(StreamType &Str, const Operand &Op) {
   Op.dump(Str);
   return Str;
 }
 
 /// Constant is the abstract base class for constants. All constants are
 /// allocated from a global arena and are pooled.
@@ skipping 614 matching lines @@
   void dump(const Cfg *Func, Ostream &Str) const override;
 
   /// Return reg num of base register, if different from stack/frame register.
   virtual RegNumT getBaseRegNum() const { return RegNumT(); }
 
   static bool classof(const Operand *Operand) {
     OperandKind Kind = Operand->getKind();
     return Kind >= kVariable && Kind <= kVariable_Max;
   }
 
+  void setDefiningInst(Inst *I) { DefiningInst = I; }
+  Inst *getDefiningInst() const { return DefiningInst; }
+
 protected:
   Variable(OperandKind K, Type Ty, SizeT Index)
       : Operand(K, Ty), Number(Index),
         RegisterClass(static_cast<RegClass>(Ty)) {
     Vars = VarsReal;
     Vars[0] = this;
     NumVars = 1;
   }
   /// Number is unique across all variables, and is used as a (bit)vector index
   /// for liveness analysis.
@@ skipping 13 matching lines @@
   /// RegNum is the allocated register, (as long as RegNum.hasValue() is true).
   RegNumT RegNum;
   /// RegNumTmp is the tentative assignment during register allocation.
   RegNumT RegNumTmp;
   /// StackOffset is the canonical location on stack (only if
   /// RegNum.hasNoValue() || IsArgument).
   int32_t StackOffset = 0;
   LiveRange Live;
   /// VarsReal (and Operand::Vars) are set up such that Vars[0] == this.
   Variable *VarsReal[1];
+  /// A pointer to the instruction of which this is the destination.
+  Inst *DefiningInst = nullptr;

[Jim Stichnoth, 2016/03/29 17:49:57]

I'm not super excited about increasing the size of
operands/variable/instructions for what is currently wasm-specific info.

Also, I don't see that this info is being updated when:
1) the defining instruction changes e.g. during lowering when the original
defining instruction is deleted and a new one is inserted
2) the defining node changes due to node splitting

I think a more appropriate approach would be to maintain various unordered_maps
during parsing and then discard them after all is parsed.

[Eric Holk, 2016/03/29 22:58:07]

I added a couple unordered_maps and removed the extra fields. They allocate from
the CFG right now, which may not be ideal, but it at least keeps the memory
usage the same on non-WASM paths.

 };
 
 // Variable64On32 represents a 64-bit variable on a 32-bit architecture. In
 // this situation the variable must be split into a low and a high word.
 class Variable64On32 : public Variable {
   Variable64On32() = delete;
   Variable64On32(const Variable64On32 &) = delete;
   Variable64On32 &operator=(const Variable64On32 &) = delete;
 
 public:
@@ skipping 158 matching lines @@
 private:
   const Cfg *Func;
   MetadataKind Kind;
   CfgVector<VariableTracking> Metadata;
   const static InstDefList NoDefinitions;
 };
 
 } // end of namespace Ice
 
 #endif // SUBZERO_SRC_ICEOPERAND_H