S390: Fix SQEBR sim to treat operands as float32

src/s390/disasm-s390.cc

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 // A Disassembler object is used to disassemble a block of code instruction by
 // instruction. The default implementation of the NameConverter object can be
 // overriden to modify register names or to do symbol lookup on addresses.
 //
 // The example below will disassemble a block of code and print it to stdout.
 //
@@ skipping 949 matching lines @@
       break;
     case CDBR:
       Format(instr, "cdbr\t'f5,'f6");
       break;
     case CEBR:
       Format(instr, "cebr\t'f5,'f6");
       break;
     case SQDBR:
       Format(instr, "sqdbr\t'f5,'f6");
       break;
+    case SQEBR:
+      Format(instr, "sqebr\t'f5,'f6");
+      break;
     case LCDBR:
       Format(instr, "lcdbr\t'f5,'f6");
       break;
     case STH:
       Format(instr, "sth\t'r1,'d1('r2d,'r3)");
       break;
     case SRDA:
       Format(instr, "srda\t'r1,'d1('r3)");
       break;
     case SRDL:
@@ skipping 419 matching lines @@
     byte* prev_pc = pc;
     pc += d.InstructionDecode(buffer, pc);
     v8::internal::PrintF(f, "%p    %08x      %s\n", prev_pc,
                          *reinterpret_cast<int32_t*>(prev_pc), buffer.start());
   }
 }
 
 }  // namespace disasm
 
 #endif  // V8_TARGET_ARCH_S390