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Issue 1835973003: S390: Impl Left/Right Logical/Arith Shift Pair (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Update srda and srdl disasm format Created 4 years, 8 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include <stdarg.h> 5 #include <stdarg.h>
6 #include <stdlib.h> 6 #include <stdlib.h>
7 #include <cmath> 7 #include <cmath>
8 8
9 #if V8_TARGET_ARCH_S390 9 #if V8_TARGET_ARCH_S390
10 10
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2184 if (SLL == op) { 2184 if (SLL == op) {
2185 alu_out = r1_val << shiftBits; 2185 alu_out = r1_val << shiftBits;
2186 } else if (SRL == op) { 2186 } else if (SRL == op) {
2187 alu_out = r1_val >> shiftBits; 2187 alu_out = r1_val >> shiftBits;
2188 } else { 2188 } else {
2189 UNREACHABLE(); 2189 UNREACHABLE();
2190 } 2190 }
2191 set_low_register(r1, alu_out); 2191 set_low_register(r1, alu_out);
2192 break; 2192 break;
2193 } 2193 }
2194 case SLDL: {
2195 RSInstruction* rsInstr = reinterpret_cast<RSInstruction*>(instr);
2196 int r1 = rsInstr->R1Value();
2197 int b2 = rsInstr->B2Value();
2198 intptr_t d2 = rsInstr->D2Value();
2199 // only takes rightmost 6bits
2200 int64_t b2_val = b2 == 0 ? 0 : get_register(b2);
2201 int shiftBits = (b2_val + d2) & 0x3F;
2202
2203 DCHECK(r1 % 2 == 0);
2204 uint32_t r1_val = get_low_register<uint32_t>(r1);
2205 uint32_t r1_next_val = get_low_register<uint32_t>(r1 + 1);
2206 uint64_t alu_out = (static_cast<uint64_t>(r1_val) << 32) |
2207 (static_cast<uint64_t>(r1_next_val));
2208 alu_out <<= shiftBits;
2209 set_low_register(r1 + 1, static_cast<uint32_t>(alu_out));
2210 set_low_register(r1, static_cast<uint32_t>(alu_out >> 32));
2211 break;
2212 }
2194 case SLA: 2213 case SLA:
2195 case SRA: { 2214 case SRA: {
2196 RSInstruction* rsInstr = reinterpret_cast<RSInstruction*>(instr); 2215 RSInstruction* rsInstr = reinterpret_cast<RSInstruction*>(instr);
2197 int r1 = rsInstr->R1Value(); 2216 int r1 = rsInstr->R1Value();
2198 int b2 = rsInstr->B2Value(); 2217 int b2 = rsInstr->B2Value();
2199 intptr_t d2 = rsInstr->D2Value(); 2218 intptr_t d2 = rsInstr->D2Value();
2200 // only takes rightmost 6bits 2219 // only takes rightmost 6bits
2201 int64_t b2_val = b2 == 0 ? 0 : get_register(b2); 2220 int64_t b2_val = b2 == 0 ? 0 : get_register(b2);
2202 int shiftBits = (b2_val + d2) & 0x3F; 2221 int shiftBits = (b2_val + d2) & 0x3F;
2203 int32_t r1_val = get_low_register<int32_t>(r1); 2222 int32_t r1_val = get_low_register<int32_t>(r1);
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5020 uintptr_t address = *stack_slot; 5039 uintptr_t address = *stack_slot;
5021 set_register(sp, current_sp + sizeof(uintptr_t)); 5040 set_register(sp, current_sp + sizeof(uintptr_t));
5022 return address; 5041 return address;
5023 } 5042 }
5024 5043
5025 } // namespace internal 5044 } // namespace internal
5026 } // namespace v8 5045 } // namespace v8
5027 5046
5028 #endif // USE_SIMULATOR 5047 #endif // USE_SIMULATOR
5029 #endif // V8_TARGET_ARCH_S390 5048 #endif // V8_TARGET_ARCH_S390
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