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| 1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
| 2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
| 3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
| 4 | 4 |
| 5 #include <assert.h> // For assert | 5 #include <assert.h> // For assert |
| 6 #include <limits.h> // For LONG_MIN, LONG_MAX. | 6 #include <limits.h> // For LONG_MIN, LONG_MAX. |
| 7 | 7 |
| 8 #if V8_TARGET_ARCH_S390 | 8 #if V8_TARGET_ARCH_S390 |
| 9 | 9 |
| 10 #include "src/base/bits.h" | 10 #include "src/base/bits.h" |
| (...skipping 874 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 885 clgdbr(m, Condition(0), dst, double_input); | 885 clgdbr(m, Condition(0), dst, double_input); |
| 886 ldgr(double_dst, dst); | 886 ldgr(double_dst, dst); |
| 887 } | 887 } |
| 888 | 888 |
| 889 #endif | 889 #endif |
| 890 | 890 |
| 891 #if !V8_TARGET_ARCH_S390X | 891 #if !V8_TARGET_ARCH_S390X |
| 892 void MacroAssembler::ShiftLeftPair(Register dst_low, Register dst_high, | 892 void MacroAssembler::ShiftLeftPair(Register dst_low, Register dst_high, |
| 893 Register src_low, Register src_high, | 893 Register src_low, Register src_high, |
| 894 Register scratch, Register shift) { | 894 Register scratch, Register shift) { |
| 895 DCHECK(!AreAliased(dst_low, src_high, shift)); | 895 LoadRR(r0, src_high); |
| 896 DCHECK(!AreAliased(dst_high, src_low, shift)); | 896 LoadRR(r1, src_low); |
| 897 UNIMPLEMENTED(); | 897 sldl(r0, shift, Operand::Zero()); |
| 898 LoadRR(dst_high, r0); |
| 899 LoadRR(dst_low, r1); |
| 898 } | 900 } |
| 899 | 901 |
| 900 void MacroAssembler::ShiftLeftPair(Register dst_low, Register dst_high, | 902 void MacroAssembler::ShiftLeftPair(Register dst_low, Register dst_high, |
| 901 Register src_low, Register src_high, | 903 Register src_low, Register src_high, |
| 902 uint32_t shift) { | 904 uint32_t shift) { |
| 903 DCHECK(!AreAliased(dst_low, src_high)); | 905 LoadRR(r0, src_high); |
| 904 DCHECK(!AreAliased(dst_high, src_low)); | 906 LoadRR(r1, src_low); |
| 905 UNIMPLEMENTED(); | 907 sldl(r0, r0, Operand(shift)); |
| 906 Label less_than_32; | 908 LoadRR(dst_high, r0); |
| 907 Label done; | 909 LoadRR(dst_low, r1); |
| 908 } | 910 } |
| 909 | 911 |
| 910 void MacroAssembler::ShiftRightPair(Register dst_low, Register dst_high, | 912 void MacroAssembler::ShiftRightPair(Register dst_low, Register dst_high, |
| 911 Register src_low, Register src_high, | 913 Register src_low, Register src_high, |
| 912 Register scratch, Register shift) { | 914 Register scratch, Register shift) { |
| 913 DCHECK(!AreAliased(dst_low, src_high, shift)); | 915 LoadRR(r0, src_high); |
| 914 DCHECK(!AreAliased(dst_high, src_low, shift)); | 916 LoadRR(r1, src_low); |
| 915 UNIMPLEMENTED(); | 917 srdl(r0, shift, Operand::Zero()); |
| 918 LoadRR(dst_high, r0); |
| 919 LoadRR(dst_low, r1); |
| 916 } | 920 } |
| 917 | 921 |
| 918 void MacroAssembler::ShiftRightPair(Register dst_low, Register dst_high, | 922 void MacroAssembler::ShiftRightPair(Register dst_low, Register dst_high, |
| 919 Register src_low, Register src_high, | 923 Register src_low, Register src_high, |
| 920 uint32_t shift) { | 924 uint32_t shift) { |
| 921 DCHECK(!AreAliased(dst_low, src_high)); | 925 LoadRR(r0, src_high); |
| 922 DCHECK(!AreAliased(dst_high, src_low)); | 926 LoadRR(r1, src_low); |
| 923 UNIMPLEMENTED(); | 927 srdl(r0, r0, Operand(shift)); |
| 928 LoadRR(dst_high, r0); |
| 929 LoadRR(dst_low, r1); |
| 924 } | 930 } |
| 925 | 931 |
| 926 void MacroAssembler::ShiftRightArithPair(Register dst_low, Register dst_high, | 932 void MacroAssembler::ShiftRightArithPair(Register dst_low, Register dst_high, |
| 927 Register src_low, Register src_high, | 933 Register src_low, Register src_high, |
| 928 Register scratch, Register shift) { | 934 Register scratch, Register shift) { |
| 929 DCHECK(!AreAliased(dst_low, src_high, shift)); | 935 LoadRR(r0, src_high); |
| 930 DCHECK(!AreAliased(dst_high, src_low, shift)); | 936 LoadRR(r1, src_low); |
| 931 UNIMPLEMENTED(); | 937 srda(r0, shift, Operand::Zero()); |
| 938 LoadRR(dst_high, r0); |
| 939 LoadRR(dst_low, r1); |
| 932 } | 940 } |
| 933 | 941 |
| 934 void MacroAssembler::ShiftRightArithPair(Register dst_low, Register dst_high, | 942 void MacroAssembler::ShiftRightArithPair(Register dst_low, Register dst_high, |
| 935 Register src_low, Register src_high, | 943 Register src_low, Register src_high, |
| 936 uint32_t shift) { | 944 uint32_t shift) { |
| 937 DCHECK(!AreAliased(dst_low, src_high)); | 945 LoadRR(r0, src_high); |
| 938 DCHECK(!AreAliased(dst_high, src_low)); | 946 LoadRR(r1, src_low); |
| 939 UNIMPLEMENTED(); | 947 srdl(r0, r0, Operand(shift)); |
| 948 LoadRR(dst_high, r0); |
| 949 LoadRR(dst_low, r1); |
| 940 } | 950 } |
| 941 #endif | 951 #endif |
| 942 | 952 |
| 943 void MacroAssembler::MovDoubleToInt64(Register dst, DoubleRegister src) { | 953 void MacroAssembler::MovDoubleToInt64(Register dst, DoubleRegister src) { |
| 944 lgdr(dst, src); | 954 lgdr(dst, src); |
| 945 } | 955 } |
| 946 | 956 |
| 947 void MacroAssembler::MovInt64ToDouble(DoubleRegister dst, Register src) { | 957 void MacroAssembler::MovInt64ToDouble(DoubleRegister dst, Register src) { |
| 948 ldgr(dst, src); | 958 ldgr(dst, src); |
| 949 } | 959 } |
| (...skipping 4564 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 5514 } | 5524 } |
| 5515 if (mag.shift > 0) ShiftRightArith(result, result, Operand(mag.shift)); | 5525 if (mag.shift > 0) ShiftRightArith(result, result, Operand(mag.shift)); |
| 5516 ExtractBit(r0, dividend, 31); | 5526 ExtractBit(r0, dividend, 31); |
| 5517 AddP(result, r0); | 5527 AddP(result, r0); |
| 5518 } | 5528 } |
| 5519 | 5529 |
| 5520 } // namespace internal | 5530 } // namespace internal |
| 5521 } // namespace v8 | 5531 } // namespace v8 |
| 5522 | 5532 |
| 5523 #endif // V8_TARGET_ARCH_S390 | 5533 #endif // V8_TARGET_ARCH_S390 |
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