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Unified Diff: src/mips/deoptimizer-mips.cc

Issue 18356008: Remove special-casing of EAGER and SOFT deoptimization calling conventions, allowing calling addres… (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Created 7 years, 5 months ago
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Index: src/mips/deoptimizer-mips.cc
diff --git a/src/mips/deoptimizer-mips.cc b/src/mips/deoptimizer-mips.cc
index 6978cde52bbfd2ee0b984bf724b15e3573301c2a..1fe5fd152d6eb5e45c53c329b53ce2632420ef5d 100644
--- a/src/mips/deoptimizer-mips.cc
+++ b/src/mips/deoptimizer-mips.cc
@@ -457,14 +457,10 @@ void Deoptimizer::EntryGenerator::Generate() {
// Get the bailout id from the stack.
__ lw(a2, MemOperand(sp, kSavedRegistersAreaSize));
- // Get the address of the location in the code object if possible (a3) (return
+ // Get the address of the location in the code object (a3) (return
// address for lazy deoptimization) and compute the fp-to-sp delta in
// register t0.
- if (type() == EAGER || type() == SOFT) {
- __ mov(a3, zero_reg);
- // Correct one word for bailout id.
- __ Addu(t0, sp, Operand(kSavedRegistersAreaSize + (1 * kPointerSize)));
- } else if (type() == OSR) {
+ if (type() == EAGER || type() == SOFT || type() == OSR) {
danno 2013/07/10 10:04:30 As with ARM, why the special handling of LAZY?
titzer 2013/07/11 09:43:43 Done.
__ mov(a3, ra);
// Correct one word for bailout id.
__ Addu(t0, sp, Operand(kSavedRegistersAreaSize + (1 * kPointerSize)));

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