| Index: lib/Target/NVPTX/NVPTXTargetMachine.cpp
|
| diff --git a/lib/Target/NVPTX/NVPTXTargetMachine.cpp b/lib/Target/NVPTX/NVPTXTargetMachine.cpp
|
| index 1ae2a7cc8622d557735d0d751beaccdcb7be9a0f..67ca6b58e5a69903b6a0f3eda34181762fd54da0 100644
|
| --- a/lib/Target/NVPTX/NVPTXTargetMachine.cpp
|
| +++ b/lib/Target/NVPTX/NVPTXTargetMachine.cpp
|
| @@ -49,7 +49,6 @@ using namespace llvm;
|
|
|
| namespace llvm {
|
| void initializeNVVMReflectPass(PassRegistry&);
|
| -void initializeGenericToNVVMPass(PassRegistry&);
|
| }
|
|
|
| extern "C" void LLVMInitializeNVPTXTarget() {
|
| @@ -63,7 +62,6 @@ extern "C" void LLVMInitializeNVPTXTarget() {
|
| // FIXME: This pass is really intended to be invoked during IR optimization,
|
| // but it's very NVPTX-specific.
|
| initializeNVVMReflectPass(*PassRegistry::getPassRegistry());
|
| - initializeGenericToNVVMPass(*PassRegistry::getPassRegistry());
|
| }
|
|
|
| NVPTXTargetMachine::NVPTXTargetMachine(
|
| @@ -102,7 +100,6 @@ public:
|
| return getTM<NVPTXTargetMachine>();
|
| }
|
|
|
| - virtual void addIRPasses();
|
| virtual bool addInstSelector();
|
| virtual bool addPreRegAlloc();
|
| };
|
| @@ -113,11 +110,6 @@ TargetPassConfig *NVPTXTargetMachine::createPassConfig(PassManagerBase &PM) {
|
| return PassConfig;
|
| }
|
|
|
| -void NVPTXPassConfig::addIRPasses() {
|
| - TargetPassConfig::addIRPasses();
|
| - addPass(createGenericToNVVMPass());
|
| -}
|
| -
|
| bool NVPTXPassConfig::addInstSelector() {
|
| addPass(createLowerAggrCopies());
|
| addPass(createSplitBBatBarPass());
|
|
|