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Side by Side Diff: test/CodeGen/R600/r600-encoding.ll

Issue 183273009: Prep for merging 3.4: Undo changes from 3.3 branch (Closed) Base URL: http://git.chromium.org/native_client/pnacl-llvm.git@master
Patch Set: Retry Created 6 years, 9 months ago
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1 ; RUN: llc < %s -march=r600 -show-mc-encoding -mcpu=redwood | FileCheck --check- prefix=EG-CHECK %s
2 ; RUN: llc < %s -march=r600 -show-mc-encoding -mcpu=rs880 | FileCheck --check-pr efix=R600-CHECK %s
3
4 ; The earliest R600 GPUs have a slightly different encoding than the rest of
5 ; the VLIW4/5 GPUs.
6
7 ; EG-CHECK: @test
8 ; EG-CHECK: MUL_IEEE {{[ *TXYZW.,0-9]+}} ; encoding: [{{0x[0-9a-f]+,0x[0-9a-f]+, 0x[0-9a-f]+,0x[0-9a-f]+,0x10,0x01,0x[0-9a-f]+,0x[0-9a-f]+}}]
9
10 ; R600-CHECK: @test
11 ; R600-CHECK: MUL_IEEE {{[ *TXYZW.,0-9]+}} ; encoding: [{{0x[0-9a-f]+,0x[0-9a-f] +,0x[0-9a-f]+,0x[0-9a-f]+,0x10,0x02,0x[0-9a-f]+,0x[0-9a-f]+}}]
12
13 define void @test() {
14 entry:
15 %0 = call float @llvm.R600.load.input(i32 0)
16 %1 = call float @llvm.R600.load.input(i32 1)
17 %2 = fmul float %0, %1
18 call void @llvm.AMDGPU.store.output(float %2, i32 0)
19 ret void
20 }
21
22 declare float @llvm.R600.load.input(i32) readnone
23
24 declare void @llvm.AMDGPU.store.output(float, i32)
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