Prep for merging 3.4: Undo changes from 3.3 branch

lib/Target/X86/X86Subtarget.cpp

 //===-- X86Subtarget.cpp - X86 Subtarget Information ----------------------===//
 //
 //                     The LLVM Compiler Infrastructure
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 // This file implements the X86 specific subclass of TargetSubtargetInfo.
@@ skipping 161 matching lines @@
   // For NaCl dynamic linking we do not want to generate a text relocation to
   // an absolute address in PIC mode.  Such a situation arises from
   // test/CodeGen/X86/call-imm.ll with the default implementation.
   // For other platforms we retain the default behavior.
   return (isTargetELF() && !isTargetNaCl()) ||
          TM.getRelocationModel() == Reloc::Static;
   // @LOCALMOD-END
 }
 
 static bool OSHasAVXSupport() {
-#if defined(i386) || defined(__i386__) || defined(__x86__) || defined(_M_IX86)\
-    || defined(__x86_64__) || defined(_M_AMD64) || defined (_M_X64)
+#if defined(i386) || defined(__i386__) || defined(__x86__) || defined(_M_IX86)
 #if defined(__GNUC__)
   // Check xgetbv; this uses a .byte sequence instead of the instruction
   // directly because older assemblers do not include support for xgetbv and
   // there is no easy way to conditionally compile based on the assembler used.
   int rEAX, rEDX;
   __asm__ (".byte 0x0f, 0x01, 0xd0" : "=a" (rEAX), "=d" (rEDX) : "c" (0));
 #elif defined(_MSC_FULL_VER) && defined(_XCR_XFEATURE_ENABLED_MASK)
   unsigned long long rEAX = _xgetbv(_XCR_XFEATURE_ENABLED_MASK);
 #else
   int rEAX = 0; // Ensures we return false
@@ skipping 324 matching lines @@
 }
 
 bool X86Subtarget::enablePostRAScheduler(
            CodeGenOpt::Level OptLevel,
            TargetSubtargetInfo::AntiDepBreakMode& Mode,
            RegClassVector& CriticalPathRCs) const {
   Mode = TargetSubtargetInfo::ANTIDEP_CRITICAL;
   CriticalPathRCs.clear();
   return PostRAScheduler && OptLevel >= CodeGenOpt::Default;
 }