Prep for merging 3.4: Undo changes from 3.3 branch

lib/Target/PowerPC/PPCFrameLowering.cpp

 //===-- PPCFrameLowering.cpp - PPC Frame Information ----------------------===//
 //
 //                     The LLVM Compiler Infrastructure
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 // This file contains the PPC implementation of TargetFrameLowering class.
@@ skipping 1152 matching lines @@
     }
 
     // Insert the spill to the stack frame.
     if (IsCRField) {
       PPCFunctionInfo *FuncInfo = MF->getInfo<PPCFunctionInfo>();
       if (Subtarget.isPPC64()) {
         // The actual spill will happen at the start of the prologue.
         FuncInfo->addMustSaveCR(Reg);
       } else {
         CRSpilled = true;
-        FuncInfo->setSpillsCR();
 
         // 32-bit:  FP-relative.  Note that we made sure CR2-CR4 all have
         // the same frame index in PPCRegisterInfo::hasReservedSpillSlot.
         CRMIB = BuildMI(*MF, DL, TII.get(PPC::MFCR), PPC::R12)
                   .addReg(Reg, RegState::ImplicitKill);
 
         MBB.insert(MI, CRMIB);
         MBB.insert(MI, addFrameReference(BuildMI(*MF, DL, TII.get(PPC::STW))
                                          .addReg(PPC::R12,
                                                  getKillRegState(true)),
@@ skipping 160 matching lines @@
   // If we haven't yet spilled the CRs, do so now.
   if (CR2Spilled || CR3Spilled || CR4Spilled) {
     bool is31 = needsFP(*MF); 
     restoreCRs(Subtarget.isPPC64(), is31, CR2Spilled, CR3Spilled, CR4Spilled,
                MBB, I, CSI, CSIIndex);
   }
 
   return true;
 }