Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(130)

Side by Side Diff: lib/Target/NVPTX/NVPTXIntrinsics.td

Issue 183273009: Prep for merging 3.4: Undo changes from 3.3 branch (Closed) Base URL: http://git.chromium.org/native_client/pnacl-llvm.git@master
Patch Set: Retry Created 6 years, 9 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch
« no previous file with comments | « lib/Target/NVPTX/NVPTXInstrInfo.td ('k') | lib/Target/NVPTX/NVPTXTargetMachine.cpp » ('j') | no next file with comments »
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
1 //===- NVPTXIntrinsics.td - PTX Intrinsics Instructions -------*- tblgen -*-==// 1 //===- NVPTXIntrinsics.td - PTX Intrinsics Instructions -------*- tblgen -*-==//
2 // 2 //
3 // The LLVM Compiler Infrastructure 3 // The LLVM Compiler Infrastructure
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 9
10 def immFloat0 : PatLeaf<(fpimm), [{ 10 def immFloat0 : PatLeaf<(fpimm), [{
(...skipping 494 matching lines...) Expand 10 before | Expand all | Expand 10 after
505 505
506 def INT_NVVM_SQRT_RN_D : F_MATH_1<"sqrt.rn.f64 \t$dst, $src0;", Float64Regs, 506 def INT_NVVM_SQRT_RN_D : F_MATH_1<"sqrt.rn.f64 \t$dst, $src0;", Float64Regs,
507 Float64Regs, int_nvvm_sqrt_rn_d>; 507 Float64Regs, int_nvvm_sqrt_rn_d>;
508 def INT_NVVM_SQRT_RZ_D : F_MATH_1<"sqrt.rz.f64 \t$dst, $src0;", Float64Regs, 508 def INT_NVVM_SQRT_RZ_D : F_MATH_1<"sqrt.rz.f64 \t$dst, $src0;", Float64Regs,
509 Float64Regs, int_nvvm_sqrt_rz_d>; 509 Float64Regs, int_nvvm_sqrt_rz_d>;
510 def INT_NVVM_SQRT_RM_D : F_MATH_1<"sqrt.rm.f64 \t$dst, $src0;", Float64Regs, 510 def INT_NVVM_SQRT_RM_D : F_MATH_1<"sqrt.rm.f64 \t$dst, $src0;", Float64Regs,
511 Float64Regs, int_nvvm_sqrt_rm_d>; 511 Float64Regs, int_nvvm_sqrt_rm_d>;
512 def INT_NVVM_SQRT_RP_D : F_MATH_1<"sqrt.rp.f64 \t$dst, $src0;", Float64Regs, 512 def INT_NVVM_SQRT_RP_D : F_MATH_1<"sqrt.rp.f64 \t$dst, $src0;", Float64Regs,
513 Float64Regs, int_nvvm_sqrt_rp_d>; 513 Float64Regs, int_nvvm_sqrt_rp_d>;
514 514
515 // nvvm_sqrt intrinsic
516 def : Pat<(int_nvvm_sqrt_f Float32Regs:$a),
517 (INT_NVVM_SQRT_RN_FTZ_F Float32Regs:$a)>, Requires<[doF32FTZ, do_SQRTF 32_RN]>;
518 def : Pat<(int_nvvm_sqrt_f Float32Regs:$a),
519 (INT_NVVM_SQRT_RN_F Float32Regs:$a)>, Requires<[do_SQRTF32_RN]>;
520 def : Pat<(int_nvvm_sqrt_f Float32Regs:$a),
521 (INT_NVVM_SQRT_APPROX_FTZ_F Float32Regs:$a)>, Requires<[doF32FTZ]>;
522 def : Pat<(int_nvvm_sqrt_f Float32Regs:$a),
523 (INT_NVVM_SQRT_APPROX_F Float32Regs:$a)>;
524
525 // 515 //
526 // Rsqrt 516 // Rsqrt
527 // 517 //
528 518
529 def INT_NVVM_RSQRT_APPROX_FTZ_F 519 def INT_NVVM_RSQRT_APPROX_FTZ_F
530 : F_MATH_1<"rsqrt.approx.ftz.f32 \t$dst, $src0;", Float32Regs, Float32Regs, 520 : F_MATH_1<"rsqrt.approx.ftz.f32 \t$dst, $src0;", Float32Regs, Float32Regs,
531 int_nvvm_rsqrt_approx_ftz_f>; 521 int_nvvm_rsqrt_approx_ftz_f>;
532 def INT_NVVM_RSQRT_APPROX_F : F_MATH_1<"rsqrt.approx.f32 \t$dst, $src0;", 522 def INT_NVVM_RSQRT_APPROX_F : F_MATH_1<"rsqrt.approx.f32 \t$dst, $src0;",
533 Float32Regs, Float32Regs, int_nvvm_rsqrt_approx_f>; 523 Float32Regs, Float32Regs, int_nvvm_rsqrt_approx_f>;
534 def INT_NVVM_RSQRT_APPROX_D : F_MATH_1<"rsqrt.approx.f64 \t$dst, $src0;", 524 def INT_NVVM_RSQRT_APPROX_D : F_MATH_1<"rsqrt.approx.f64 \t$dst, $src0;",
(...skipping 978 matching lines...) Expand 10 before | Expand all | Expand 10 after
1513 "mov.u32 \t$result, $src;", 1503 "mov.u32 \t$result, $src;",
1514 [(set Int32Regs:$result, (Intrin Int32Regs:$src))]>; 1504 [(set Int32Regs:$result, (Intrin Int32Regs:$src))]>;
1515 def _no_64 : NVPTXInst<(outs Int64Regs:$result), (ins Int64Regs:$src), 1505 def _no_64 : NVPTXInst<(outs Int64Regs:$result), (ins Int64Regs:$src),
1516 "mov.u64 \t$result, $src;", 1506 "mov.u64 \t$result, $src;",
1517 [(set Int64Regs:$result, (Intrin Int64Regs:$src))]>; 1507 [(set Int64Regs:$result, (Intrin Int64Regs:$src))]>;
1518 } 1508 }
1519 1509
1520 defm cvta_local : NG_TO_G<"local", int_nvvm_ptr_local_to_gen>; 1510 defm cvta_local : NG_TO_G<"local", int_nvvm_ptr_local_to_gen>;
1521 defm cvta_shared : NG_TO_G<"shared", int_nvvm_ptr_shared_to_gen>; 1511 defm cvta_shared : NG_TO_G<"shared", int_nvvm_ptr_shared_to_gen>;
1522 defm cvta_global : NG_TO_G<"global", int_nvvm_ptr_global_to_gen>; 1512 defm cvta_global : NG_TO_G<"global", int_nvvm_ptr_global_to_gen>;
1523 defm cvta_const : NG_TO_G<"const", int_nvvm_ptr_constant_to_gen>;
1524 1513
1525 defm cvta_to_local : G_TO_NG<"local", int_nvvm_ptr_gen_to_local>; 1514 defm cvta_to_local : G_TO_NG<"local", int_nvvm_ptr_gen_to_local>;
1526 defm cvta_to_shared : G_TO_NG<"shared", int_nvvm_ptr_gen_to_shared>; 1515 defm cvta_to_shared : G_TO_NG<"shared", int_nvvm_ptr_gen_to_shared>;
1527 defm cvta_to_global : G_TO_NG<"global", int_nvvm_ptr_gen_to_global>; 1516 defm cvta_to_global : G_TO_NG<"global", int_nvvm_ptr_gen_to_global>;
1528 defm cvta_to_const : G_TO_NG<"const", int_nvvm_ptr_gen_to_constant>; 1517
1518 def cvta_const : NVPTXInst<(outs Int32Regs:$result), (ins Int32Regs:$src),
1519 "mov.u32 \t$result, $src;",
1520 [(set Int32Regs:$result, (int_nvvm_ptr_constant_to_gen Int32Regs:$src))]>;
1521 def cvta_const_64 : NVPTXInst<(outs Int64Regs:$result), (ins Int64Regs:$src),
1522 "mov.u64 \t$result, $src;",
1523 [(set Int64Regs:$result, (int_nvvm_ptr_constant_to_gen Int64Regs:$src))]>;
1524
1525
1526
1527 // @TODO: Revisit this. There is a type
1528 // contradiction between iPTRAny and iPTR for the def.
1529 /*def cvta_const_addr : NVPTXInst<(outs Int32Regs:$result), (ins imemAny:$src),
1530 "mov.u32 \t$result, $src;",
1531 [(set Int32Regs:$result, (int_nvvm_ptr_constant_to_gen
1532 (Wrapper tglobaladdr:$src)))]>;
1533 def cvta_const_addr_64 : NVPTXInst<(outs Int64Regs:$result), (ins imemAny:$src),
1534 "mov.u64 \t$result, $src;",
1535 [(set Int64Regs:$result, (int_nvvm_ptr_constant_to_gen
1536 (Wrapper tglobaladdr:$src)))]>;*/
1537
1538
1539 def cvta_to_const : NVPTXInst<(outs Int32Regs:$result), (ins Int32Regs:$src),
1540 "mov.u32 \t$result, $src;",
1541 [(set Int32Regs:$result, (int_nvvm_ptr_gen_to_constant Int32Regs:$src))]>;
1542 def cvta_to_const_64 : NVPTXInst<(outs Int64Regs:$result), (ins Int64Regs:$src),
1543 "mov.u64 \t$result, $src;",
1544 [(set Int64Regs:$result, (int_nvvm_ptr_gen_to_constant Int64Regs:$src))]>;
1529 1545
1530 1546
1531 // nvvm.ptr.gen.to.param 1547 // nvvm.ptr.gen.to.param
1532 def nvvm_ptr_gen_to_param : NVPTXInst<(outs Int32Regs:$result), 1548 def nvvm_ptr_gen_to_param : NVPTXInst<(outs Int32Regs:$result),
1533 (ins Int32Regs:$src), 1549 (ins Int32Regs:$src),
1534 "mov.u32 \t$result, $src;", 1550 "mov.u32 \t$result, $src;",
1535 [(set Int32Regs:$result, 1551 [(set Int32Regs:$result,
1536 (int_nvvm_ptr_gen_to_param Int32Regs:$src))]>; 1552 (int_nvvm_ptr_gen_to_param Int32Regs:$src))]>;
1537 def nvvm_ptr_gen_to_param_64 : NVPTXInst<(outs Int64Regs:$result), 1553 def nvvm_ptr_gen_to_param_64 : NVPTXInst<(outs Int64Regs:$result),
1538 (ins Int64Regs:$src), 1554 (ins Int64Regs:$src),
(...skipping 172 matching lines...) Expand 10 before | Expand all | Expand 10 after
1711 1727
1712 def PTX_READ_PM0 : PTX_READ_SPECIAL_REGISTER_R32<"pm0", int_ptx_read_pm0>; 1728 def PTX_READ_PM0 : PTX_READ_SPECIAL_REGISTER_R32<"pm0", int_ptx_read_pm0>;
1713 def PTX_READ_PM1 : PTX_READ_SPECIAL_REGISTER_R32<"pm1", int_ptx_read_pm1>; 1729 def PTX_READ_PM1 : PTX_READ_SPECIAL_REGISTER_R32<"pm1", int_ptx_read_pm1>;
1714 def PTX_READ_PM2 : PTX_READ_SPECIAL_REGISTER_R32<"pm2", int_ptx_read_pm2>; 1730 def PTX_READ_PM2 : PTX_READ_SPECIAL_REGISTER_R32<"pm2", int_ptx_read_pm2>;
1715 def PTX_READ_PM3 : PTX_READ_SPECIAL_REGISTER_R32<"pm3", int_ptx_read_pm3>; 1731 def PTX_READ_PM3 : PTX_READ_SPECIAL_REGISTER_R32<"pm3", int_ptx_read_pm3>;
1716 1732
1717 // PTX Parallel Synchronization and Communication Intrinsics 1733 // PTX Parallel Synchronization and Communication Intrinsics
1718 1734
1719 def PTX_BAR_SYNC : NVPTXInst<(outs), (ins i32imm:$i), "bar.sync\t$i;", 1735 def PTX_BAR_SYNC : NVPTXInst<(outs), (ins i32imm:$i), "bar.sync\t$i;",
1720 [(int_ptx_bar_sync imm:$i)]>; 1736 [(int_ptx_bar_sync imm:$i)]>;
OLDNEW
« no previous file with comments | « lib/Target/NVPTX/NVPTXInstrInfo.td ('k') | lib/Target/NVPTX/NVPTXTargetMachine.cpp » ('j') | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698