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1 //===- NVPTXInstrInfo.td - NVPTX Instruction defs -------------*- tblgen-*-===// | 1 //===- NVPTXInstrInfo.td - NVPTX Instruction defs -------------*- tblgen-*-===// |
2 // | 2 // |
3 // The LLVM Compiler Infrastructure | 3 // The LLVM Compiler Infrastructure |
4 // | 4 // |
5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
7 // | 7 // |
8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
9 // | 9 // |
10 // This file describes the PTX instructions in TableGen format. | 10 // This file describes the PTX instructions in TableGen format. |
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68 def doFMADF32_ftz : Predicate<"(doFMADF32 && UseF32FTZ)">; | 68 def doFMADF32_ftz : Predicate<"(doFMADF32 && UseF32FTZ)">; |
69 | 69 |
70 def doMulWide : Predicate<"doMulWide">; | 70 def doMulWide : Predicate<"doMulWide">; |
71 | 71 |
72 def allowFMA : Predicate<"allowFMA">; | 72 def allowFMA : Predicate<"allowFMA">; |
73 def allowFMA_ftz : Predicate<"(allowFMA && UseF32FTZ)">; | 73 def allowFMA_ftz : Predicate<"(allowFMA && UseF32FTZ)">; |
74 | 74 |
75 def do_DIVF32_APPROX : Predicate<"do_DIVF32_PREC==0">; | 75 def do_DIVF32_APPROX : Predicate<"do_DIVF32_PREC==0">; |
76 def do_DIVF32_FULL : Predicate<"do_DIVF32_PREC==1">; | 76 def do_DIVF32_FULL : Predicate<"do_DIVF32_PREC==1">; |
77 | 77 |
78 def do_SQRTF32_APPROX : Predicate<"do_SQRTF32_PREC==0">; | |
79 def do_SQRTF32_RN : Predicate<"do_SQRTF32_PREC==1">; | |
80 | |
81 def hasHWROT32 : Predicate<"Subtarget.hasHWROT32()">; | 78 def hasHWROT32 : Predicate<"Subtarget.hasHWROT32()">; |
82 | 79 |
83 def true : Predicate<"1">; | 80 def true : Predicate<"1">; |
84 | 81 |
85 //===----------------------------------------------------------------------===// | 82 //===----------------------------------------------------------------------===// |
86 // Special Handling for 8-bit Operands and Operations | 83 // Special Handling for 8-bit Operands and Operations |
87 // | 84 // |
88 // PTX supports 8-bit signed and unsigned types, but does not support 8-bit | 85 // PTX supports 8-bit signed and unsigned types, but does not support 8-bit |
89 // operations (like add, shift, etc) except for ld/st/cvt. SASS does not have | 86 // operations (like add, shift, etc) except for ld/st/cvt. SASS does not have |
90 // 8-bit registers. | 87 // 8-bit registers. |
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2871 | 2868 |
2872 | 2869 |
2873 //----------------------------------- | 2870 //----------------------------------- |
2874 // Notes | 2871 // Notes |
2875 //----------------------------------- | 2872 //----------------------------------- |
2876 // BSWAP is currently expanded. The following is a more efficient | 2873 // BSWAP is currently expanded. The following is a more efficient |
2877 // - for < sm_20, use vector scalar mov, as tesla support native 16-bit register | 2874 // - for < sm_20, use vector scalar mov, as tesla support native 16-bit register |
2878 // - for sm_20, use pmpt (use vector scalar mov to get the pack and | 2875 // - for sm_20, use pmpt (use vector scalar mov to get the pack and |
2879 // unpack). sm_20 supports native 32-bit register, but not native 16-bit | 2876 // unpack). sm_20 supports native 32-bit register, but not native 16-bit |
2880 // register. | 2877 // register. |
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