Fixes ARM assembler test for hardware.

runtime/vm/assembler_arm_test.cc

Index: runtime/vm/assembler_arm_test.cc
===================================================================
--- runtime/vm/assembler_arm_test.cc	(revision 24635)
+++ runtime/vm/assembler_arm_test.cc	(working copy)
@@ -1531,6 +1531,7 @@
 
 
 ASSEMBLER_TEST_GENERATE(IntDiv_supported, assembler) {
+#if defined(USING_SIMULATOR)
   bool orig = CPUFeatures::integer_division_supported();
   CPUFeatures::set_integer_division_supported(true);
   __ mov(R0, ShifterOperand(27));
@@ -1538,6 +1539,12 @@
   __ IntegerDivide(R0, R0, R1, D0, D1);
   CPUFeatures::set_integer_division_supported(orig);
   __ bx(LR);
+#else
+  __ mov(R0, ShifterOperand(27));
+  __ mov(R1, ShifterOperand(9));
+  __ IntegerDivide(R0, R0, R1, D0, D1);
+  __ bx(LR);
+#endif
 }
 
 
@@ -1549,6 +1556,7 @@
 
 
 ASSEMBLER_TEST_GENERATE(IntDiv_unsupported, assembler) {
+#if defined(USING_SIMULATOR)
   bool orig = CPUFeatures::integer_division_supported();
   CPUFeatures::set_integer_division_supported(false);
   __ mov(R0, ShifterOperand(27));
@@ -1556,6 +1564,12 @@
   __ IntegerDivide(R0, R0, R1, D0, D1);
   CPUFeatures::set_integer_division_supported(orig);
   __ bx(LR);
+#else
+  __ mov(R0, ShifterOperand(27));
+  __ mov(R1, ShifterOperand(9));
+  __ IntegerDivide(R0, R0, R1, D0, D1);
+  __ bx(LR);
+#endif
 }