| Index: src/compiler/ppc/instruction-selector-ppc.cc
|
| diff --git a/src/compiler/ppc/instruction-selector-ppc.cc b/src/compiler/ppc/instruction-selector-ppc.cc
|
| index c680648242eacf6c0bb6786edc0e6d7e9ad63e52..95a8f317bff057d522fb4225bafae9a37453cd7e 100644
|
| --- a/src/compiler/ppc/instruction-selector-ppc.cc
|
| +++ b/src/compiler/ppc/instruction-selector-ppc.cc
|
| @@ -71,22 +71,22 @@ class PPCOperandGenerator final : public OperandGenerator {
|
|
|
| namespace {
|
|
|
| -void VisitRR(InstructionSelector* selector, ArchOpcode opcode, Node* node) {
|
| +void VisitRR(InstructionSelector* selector, InstructionCode opcode,
|
| + Node* node) {
|
| PPCOperandGenerator g(selector);
|
| selector->Emit(opcode, g.DefineAsRegister(node),
|
| g.UseRegister(node->InputAt(0)));
|
| }
|
|
|
| -
|
| -void VisitRRR(InstructionSelector* selector, ArchOpcode opcode, Node* node) {
|
| +void VisitRRR(InstructionSelector* selector, InstructionCode opcode,
|
| + Node* node) {
|
| PPCOperandGenerator g(selector);
|
| selector->Emit(opcode, g.DefineAsRegister(node),
|
| g.UseRegister(node->InputAt(0)),
|
| g.UseRegister(node->InputAt(1)));
|
| }
|
|
|
| -
|
| -void VisitRRO(InstructionSelector* selector, ArchOpcode opcode, Node* node,
|
| +void VisitRRO(InstructionSelector* selector, InstructionCode opcode, Node* node,
|
| ImmediateMode operand_mode) {
|
| PPCOperandGenerator g(selector);
|
| selector->Emit(opcode, g.DefineAsRegister(node),
|
| @@ -96,8 +96,8 @@ void VisitRRO(InstructionSelector* selector, ArchOpcode opcode, Node* node,
|
|
|
|
|
| #if V8_TARGET_ARCH_PPC64
|
| -void VisitTryTruncateDouble(InstructionSelector* selector, ArchOpcode opcode,
|
| - Node* node) {
|
| +void VisitTryTruncateDouble(InstructionSelector* selector,
|
| + InstructionCode opcode, Node* node) {
|
| PPCOperandGenerator g(selector);
|
| InstructionOperand inputs[] = {g.UseRegister(node->InputAt(0))};
|
| InstructionOperand outputs[2];
|
| @@ -156,8 +156,8 @@ void VisitBinop(InstructionSelector* selector, Node* node,
|
|
|
| // Shared routine for multiple binary operations.
|
| template <typename Matcher>
|
| -void VisitBinop(InstructionSelector* selector, Node* node, ArchOpcode opcode,
|
| - ImmediateMode operand_mode) {
|
| +void VisitBinop(InstructionSelector* selector, Node* node,
|
| + InstructionCode opcode, ImmediateMode operand_mode) {
|
| FlagsContinuation cont;
|
| VisitBinop<Matcher>(selector, node, opcode, operand_mode, &cont);
|
| }
|
| @@ -785,7 +785,7 @@ void InstructionSelector::VisitWord32Sar(Node* node) {
|
| }
|
|
|
| #if !V8_TARGET_ARCH_PPC64
|
| -void VisitPairBinop(InstructionSelector* selector, ArchOpcode opcode,
|
| +void VisitPairBinop(InstructionSelector* selector, InstructionCode opcode,
|
| Node* node) {
|
| PPCOperandGenerator g(selector);
|
|
|
| @@ -810,7 +810,7 @@ void InstructionSelector::VisitInt32PairSub(Node* node) {
|
| VisitPairBinop(this, kPPC_SubPair, node);
|
| }
|
|
|
| -void VisitPairShift(InstructionSelector* selector, ArchOpcode opcode,
|
| +void VisitPairShift(InstructionSelector* selector, InstructionCode opcode,
|
| Node* node) {
|
| PPCOperandGenerator g(selector);
|
| Int32Matcher m(node->InputAt(2));
|
| @@ -1169,7 +1169,7 @@ void InstructionSelector::VisitBitcastInt64ToFloat64(Node* node) {
|
|
|
|
|
| void InstructionSelector::VisitFloat32Add(Node* node) {
|
| - VisitRRR(this, kPPC_AddDouble, node);
|
| + VisitRRR(this, kPPC_AddDouble | MiscField::encode(1), node);
|
| }
|
|
|
|
|
| @@ -1183,11 +1183,11 @@ void InstructionSelector::VisitFloat32Sub(Node* node) {
|
| PPCOperandGenerator g(this);
|
| Float32BinopMatcher m(node);
|
| if (m.left().IsMinusZero()) {
|
| - Emit(kPPC_NegDouble, g.DefineAsRegister(node),
|
| + Emit(kPPC_NegDouble | MiscField::encode(1), g.DefineAsRegister(node),
|
| g.UseRegister(m.right().node()));
|
| return;
|
| }
|
| - VisitRRR(this, kPPC_SubDouble, node);
|
| + VisitRRR(this, kPPC_SubDouble | MiscField::encode(1), node);
|
| }
|
|
|
|
|
| @@ -1218,7 +1218,7 @@ void InstructionSelector::VisitFloat64Sub(Node* node) {
|
|
|
|
|
| void InstructionSelector::VisitFloat32Mul(Node* node) {
|
| - VisitRRR(this, kPPC_MulDouble, node);
|
| + VisitRRR(this, kPPC_MulDouble | MiscField::encode(1), node);
|
| }
|
|
|
|
|
| @@ -1229,7 +1229,7 @@ void InstructionSelector::VisitFloat64Mul(Node* node) {
|
|
|
|
|
| void InstructionSelector::VisitFloat32Div(Node* node) {
|
| - VisitRRR(this, kPPC_DivDouble, node);
|
| + VisitRRR(this, kPPC_DivDouble | MiscField::encode(1), node);
|
| }
|
|
|
|
|
| @@ -1259,7 +1259,7 @@ void InstructionSelector::VisitFloat64Min(Node* node) { UNREACHABLE(); }
|
|
|
|
|
| void InstructionSelector::VisitFloat32Abs(Node* node) {
|
| - VisitRR(this, kPPC_AbsDouble, node);
|
| + VisitRR(this, kPPC_AbsDouble | MiscField::encode(1), node);
|
| }
|
|
|
|
|
| @@ -1269,7 +1269,7 @@ void InstructionSelector::VisitFloat64Abs(Node* node) {
|
|
|
|
|
| void InstructionSelector::VisitFloat32Sqrt(Node* node) {
|
| - VisitRR(this, kPPC_SqrtDouble, node);
|
| + VisitRR(this, kPPC_SqrtDouble | MiscField::encode(1), node);
|
| }
|
|
|
|
|
| @@ -1279,7 +1279,7 @@ void InstructionSelector::VisitFloat64Sqrt(Node* node) {
|
|
|
|
|
| void InstructionSelector::VisitFloat32RoundDown(Node* node) {
|
| - VisitRR(this, kPPC_FloorDouble, node);
|
| + VisitRR(this, kPPC_FloorDouble | MiscField::encode(1), node);
|
| }
|
|
|
|
|
| @@ -1289,7 +1289,7 @@ void InstructionSelector::VisitFloat64RoundDown(Node* node) {
|
|
|
|
|
| void InstructionSelector::VisitFloat32RoundUp(Node* node) {
|
| - VisitRR(this, kPPC_CeilDouble, node);
|
| + VisitRR(this, kPPC_CeilDouble | MiscField::encode(1), node);
|
| }
|
|
|
|
|
| @@ -1299,7 +1299,7 @@ void InstructionSelector::VisitFloat64RoundUp(Node* node) {
|
|
|
|
|
| void InstructionSelector::VisitFloat32RoundTruncate(Node* node) {
|
| - VisitRR(this, kPPC_TruncateDouble, node);
|
| + VisitRR(this, kPPC_TruncateDouble | MiscField::encode(1), node);
|
| }
|
|
|
|
|
|
|