Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(172)

Side by Side Diff: lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp

Issue 18261008: PNaCl: Fix negative relocation addends on x86-32 (Closed) Base URL: http://git.chromium.org/native_client/pnacl-llvm.git@master
Patch Set: Created 7 years, 5 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch
« no previous file with comments | « no previous file | test/NaCl/ARM/negative-addend.ll » ('j') | no next file with comments »
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
1 //===-- X86AsmBackend.cpp - X86 Assembler Backend -------------------------===// 1 //===-- X86AsmBackend.cpp - X86 Assembler Backend -------------------------===//
2 // 2 //
3 // The LLVM Compiler Infrastructure 3 // The LLVM Compiler Infrastructure
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 9
10 #include "MCTargetDesc/X86BaseInfo.h" 10 #include "MCTargetDesc/X86BaseInfo.h"
(...skipping 81 matching lines...) Expand 10 before | Expand all | Expand 10 after
92 return Infos[Kind - FirstTargetFixupKind]; 92 return Infos[Kind - FirstTargetFixupKind];
93 } 93 }
94 94
95 void applyFixup(const MCFixup &Fixup, char *Data, unsigned DataSize, 95 void applyFixup(const MCFixup &Fixup, char *Data, unsigned DataSize,
96 uint64_t Value) const { 96 uint64_t Value) const {
97 unsigned Size = 1 << getFixupKindLog2Size(Fixup.getKind()); 97 unsigned Size = 1 << getFixupKindLog2Size(Fixup.getKind());
98 98
99 assert(Fixup.getOffset() + Size <= DataSize && 99 assert(Fixup.getOffset() + Size <= DataSize &&
100 "Invalid fixup offset!"); 100 "Invalid fixup offset!");
101 101
102 // @LOCALMOD-BEGIN
103 // This check breaks negative addends on x86-32. It makes x86-32
104 // behaviour inconsistent with x86-64 and ARM.
105 // See: https://code.google.com/p/nativeclient/issues/detail?id=3548
106 #if 0
102 // Check that uppper bits are either all zeros or all ones. 107 // Check that uppper bits are either all zeros or all ones.
103 // Specifically ignore overflow/underflow as long as the leakage is 108 // Specifically ignore overflow/underflow as long as the leakage is
104 // limited to the lower bits. This is to remain compatible with 109 // limited to the lower bits. This is to remain compatible with
105 // other assemblers. 110 // other assemblers.
106 assert(isIntN(Size * 8 + 1, Value) && 111 assert(isIntN(Size * 8 + 1, Value) &&
107 "Value does not fit in the Fixup field"); 112 "Value does not fit in the Fixup field");
113 #endif
114 // @LOCALMOD-END
108 115
109 for (unsigned i = 0; i != Size; ++i) 116 for (unsigned i = 0; i != Size; ++i)
110 Data[Fixup.getOffset() + i] = uint8_t(Value >> (i * 8)); 117 Data[Fixup.getOffset() + i] = uint8_t(Value >> (i * 8));
111 } 118 }
112 119
113 bool mayNeedRelaxation(const MCInst &Inst) const; 120 bool mayNeedRelaxation(const MCInst &Inst) const;
114 121
115 bool fixupNeedsRelaxation(const MCFixup &Fixup, 122 bool fixupNeedsRelaxation(const MCFixup &Fixup,
116 uint64_t Value, 123 uint64_t Value,
117 const MCRelaxableFragment *DF, 124 const MCRelaxableFragment *DF,
(...skipping 381 matching lines...) Expand 10 before | Expand all | Expand 10 after
499 if (TheTriple.isOSWindows() && TheTriple.getEnvironment() != Triple::ELF) 506 if (TheTriple.isOSWindows() && TheTriple.getEnvironment() != Triple::ELF)
500 return new WindowsX86AsmBackend(T, true, CPU); 507 return new WindowsX86AsmBackend(T, true, CPU);
501 508
502 uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(TheTriple.getOS()); 509 uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(TheTriple.getOS());
503 // @LOCALMOD-BEGIN 510 // @LOCALMOD-BEGIN
504 if (TheTriple.isOSNaCl()) 511 if (TheTriple.isOSNaCl())
505 return new NaClX86_64AsmBackend(T, OSABI, CPU); 512 return new NaClX86_64AsmBackend(T, OSABI, CPU);
506 // @LOCALMOD-END 513 // @LOCALMOD-END
507 return new ELFX86_64AsmBackend(T, OSABI, CPU); 514 return new ELFX86_64AsmBackend(T, OSABI, CPU);
508 } 515 }
OLDNEW
« no previous file with comments | « no previous file | test/NaCl/ARM/negative-addend.ll » ('j') | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698