S390: Fixed s390 simulation check for underflow in subtraction.

src/s390/simulator-s390.cc

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include <stdarg.h>
 #include <stdlib.h>
 #include <cmath>
 
 #if V8_TARGET_ARCH_S390
 
@@ skipping 1132 matching lines @@
 
 // Calculate C flag value for subtractions.
 bool Simulator::BorrowFrom(int32_t left, int32_t right) {
   uint32_t uleft = static_cast<uint32_t>(left);
   uint32_t uright = static_cast<uint32_t>(right);
 
   return (uright > uleft);
 }
 
 // Calculate V flag value for additions and subtractions.
-bool Simulator::OverflowFrom(int32_t alu_out, int32_t left, int32_t right,
-                             bool addition) {
+template <typename T1>
+bool Simulator::OverflowFromSigned(T1 alu_out, T1 left, T1 right,
+                                   bool addition) {
   bool overflow;
   if (addition) {
     // operands have the same sign
     overflow = ((left >= 0 && right >= 0) || (left < 0 && right < 0))
                // and operands and result have different sign
                && ((left < 0 && alu_out >= 0) || (left >= 0 && alu_out < 0));
   } else {
     // operands have different signs
     overflow = ((left < 0 && right >= 0) || (left >= 0 && right < 0))
                // and first operand and result have different signs
@@ skipping 468 matching lines @@
     }
   }
 }
 
 // Method for checking overflow on signed addition:
 //   Test src1 and src2 have opposite sign,
 //   (1) No overflow if they have opposite sign
 //   (2) Test the result and one of the operands have opposite sign
 //      (a) No overflow if they don't have opposite sign
 //      (b) Overflow if opposite
-#define CheckOverflowForIntAdd(src1, src2) \
-  (((src1) ^ (src2)) < 0 ? false : ((((src1) + (src2)) ^ (src1)) < 0))
+#define CheckOverflowForIntAdd(src1, src2, type) \
+  OverflowFromSigned<type>(src1 + src2, src1, src2, true);
 
-// Method for checking overflow on signed subtraction:
-#define CheckOverflowForIntSub(src1, src2) \
-  (((src1 - src2) < src1) != (src2 > 0))
+#define CheckOverflowForIntSub(src1, src2, type) \
+  OverflowFromSigned<type>(src1 - src2, src1, src2, false);
 
 // Method for checking overflow on unsigned addtion
 #define CheckOverflowForUIntAdd(src1, src2) \
   ((src1) + (src2) < (src1) || (src1) + (src2) < (src2))
 
 // Method for checking overflow on unsigned subtraction
 #define CheckOverflowForUIntSub(src1, src2) ((src1) - (src2) > (src1))
 
 // Method for checking overflow on multiplication
 #define CheckOverflowForMul(src1, src2) (((src1) * (src2)) / (src2) != (src1))
@@ skipping 20 matching lines @@
     case NR:
     case XR: {
       RRInstruction* rrinst = reinterpret_cast<RRInstruction*>(instr);
       int r1 = rrinst->R1Value();
       int r2 = rrinst->R2Value();
       int32_t r1_val = get_low_register<int32_t>(r1);
       int32_t r2_val = get_low_register<int32_t>(r2);
       bool isOF = false;
       switch (op) {
         case AR:
-          isOF = CheckOverflowForIntAdd(r1_val, r2_val);
+          isOF = CheckOverflowForIntAdd(r1_val, r2_val, int32_t);
           r1_val += r2_val;
           SetS390ConditionCode<int32_t>(r1_val, 0);
           SetS390OverflowCode(isOF);
           break;
         case SR:
-          isOF = CheckOverflowForIntSub(r1_val, r2_val);
+          isOF = CheckOverflowForIntSub(r1_val, r2_val, int32_t);
           r1_val -= r2_val;
           SetS390ConditionCode<int32_t>(r1_val, 0);
           SetS390OverflowCode(isOF);
           break;
         case OR:
           r1_val |= r2_val;
           SetS390BitWiseConditionCode<uint32_t>(r1_val);
           break;
         case NR:
           r1_val &= r2_val;
@@ skipping 748 matching lines @@
     case OGR:
     case NGR:
     case XGR: {
       int r1 = rreInst->R1Value();
       int r2 = rreInst->R2Value();
       int64_t r1_val = get_register(r1);
       int64_t r2_val = get_register(r2);
       bool isOF = false;
       switch (op) {
         case AGR:
-          isOF = CheckOverflowForIntAdd(r1_val, r2_val);
+          isOF = CheckOverflowForIntAdd(r1_val, r2_val, int64_t);
           r1_val += r2_val;
           SetS390ConditionCode<int64_t>(r1_val, 0);
           SetS390OverflowCode(isOF);
           break;
         case SGR:
-          isOF = CheckOverflowForIntSub(r1_val, r2_val);
+          isOF = CheckOverflowForIntSub(r1_val, r2_val, int64_t);
           r1_val -= r2_val;
           SetS390ConditionCode<int64_t>(r1_val, 0);
           SetS390OverflowCode(isOF);
           break;
         case OGR:
           r1_val |= r2_val;
           SetS390BitWiseConditionCode<uint64_t>(r1_val);
           break;
         case NGR:
           r1_val &= r2_val;
           SetS390BitWiseConditionCode<uint64_t>(r1_val);
           break;
         case XGR:
           r1_val ^= r2_val;
           SetS390BitWiseConditionCode<uint64_t>(r1_val);
           break;
         default:
           UNREACHABLE();
           break;
       }
       set_register(r1, r1_val);
       break;
     }
     case AGFR: {
       // Add Register (64 <- 32)  (Sign Extends 32-bit val)
       int r1 = rreInst->R1Value();
       int r2 = rreInst->R2Value();
       int64_t r1_val = get_register(r1);
       int64_t r2_val = static_cast<int64_t>(get_low_register<int32_t>(r2));
-      bool isOF = CheckOverflowForIntAdd(r1_val, r2_val);
+      bool isOF = CheckOverflowForIntAdd(r1_val, r2_val, int64_t);
       r1_val += r2_val;
       SetS390ConditionCode<int64_t>(r1_val, 0);
       SetS390OverflowCode(isOF);
       set_register(r1, r1_val);
       break;
     }
     case SGFR: {
       // Sub Reg (64 <- 32)
       int r1 = rreInst->R1Value();
       int r2 = rreInst->R2Value();
       int64_t r1_val = get_register(r1);
       int64_t r2_val = static_cast<int64_t>(get_low_register<int32_t>(r2));
       bool isOF = false;
-      isOF = CheckOverflowForIntSub(r1_val, r2_val);
+      isOF = CheckOverflowForIntSub(r1_val, r2_val, int64_t);
       r1_val -= r2_val;
       SetS390ConditionCode<int64_t>(r1_val, 0);
       SetS390OverflowCode(isOF);
       set_register(r1, r1_val);
       break;
     }
     case ARK:
     case SRK:
     case NRK:
     case ORK:
     case XRK: {
       // 32-bit Non-clobbering arithmetics / bitwise ops
       int r1 = rrfInst->R1Value();
       int r2 = rrfInst->R2Value();
       int r3 = rrfInst->R3Value();
       int32_t r2_val = get_low_register<int32_t>(r2);
       int32_t r3_val = get_low_register<int32_t>(r3);
       if (ARK == op) {
-        bool isOF = CheckOverflowForIntAdd(r2_val, r3_val);
+        bool isOF = CheckOverflowForIntAdd(r2_val, r3_val, int32_t);
         SetS390ConditionCode<int32_t>(r2_val + r3_val, 0);
         SetS390OverflowCode(isOF);
         set_low_register(r1, r2_val + r3_val);
       } else if (SRK == op) {
-        bool isOF = CheckOverflowForIntSub(r2_val, r3_val);
+        bool isOF = CheckOverflowForIntSub(r2_val, r3_val, int32_t);
         SetS390ConditionCode<int32_t>(r2_val - r3_val, 0);
         SetS390OverflowCode(isOF);
         set_low_register(r1, r2_val - r3_val);
       } else {
         // Assume bitwise operation here
         uint32_t bitwise_result = 0;
         if (NRK == op) {
           bitwise_result = r2_val & r3_val;
         } else if (ORK == op) {
           bitwise_result = r2_val | r3_val;
@@ skipping 31 matching lines @@
     case NGRK:
     case OGRK:
     case XGRK: {
       // 64-bit Non-clobbering arithmetics / bitwise ops.
       int r1 = rrfInst->R1Value();
       int r2 = rrfInst->R2Value();
       int r3 = rrfInst->R3Value();
       int64_t r2_val = get_register(r2);
       int64_t r3_val = get_register(r3);
       if (AGRK == op) {
-        bool isOF = CheckOverflowForIntAdd(r2_val, r3_val);
+        bool isOF = CheckOverflowForIntAdd(r2_val, r3_val, int64_t);
         SetS390ConditionCode<int64_t>(r2_val + r3_val, 0);
         SetS390OverflowCode(isOF);
         set_register(r1, r2_val + r3_val);
       } else if (SGRK == op) {
-        bool isOF = CheckOverflowForIntSub(r2_val, r3_val);
+        bool isOF = CheckOverflowForIntSub(r2_val, r3_val, int64_t);
         SetS390ConditionCode<int64_t>(r2_val - r3_val, 0);
         SetS390OverflowCode(isOF);
         set_register(r1, r2_val - r3_val);
       } else {
         // Assume bitwise operation here
         uint64_t bitwise_result = 0;
         if (NGRK == op) {
           bitwise_result = r2_val & r3_val;
         } else if (OGRK == op) {
           bitwise_result = r2_val | r3_val;
@@ skipping 22 matching lines @@
         bool isOF = CheckOverflowForUIntSub(r2_val, r3_val);
         SetS390ConditionCode<uint64_t>(r2_val - r3_val, 0);
         SetS390OverflowCode(isOF);
         set_register(r1, r2_val - r3_val);
       }
       break;
     }
     case AHI:
     case MHI: {
       RIInstruction* riinst = reinterpret_cast<RIInstruction*>(instr);
-      int r1 = riinst->R1Value();
-      int i = riinst->I2Value();
+      int32_t r1 = riinst->R1Value();
+      int32_t i = riinst->I2Value();
       int32_t r1_val = get_low_register<int32_t>(r1);
       bool isOF = false;
       switch (op) {
         case AHI:
-          isOF = CheckOverflowForIntAdd(r1_val, i);
+          isOF = CheckOverflowForIntAdd(r1_val, i, int32_t);
           r1_val += i;
           break;
         case MHI:
           isOF = CheckOverflowForMul(r1_val, i);
           r1_val *= i;
           break;  // no overflow indication is given
         default:
           break;
       }
       set_low_register(r1, r1_val);
       SetS390ConditionCode<int32_t>(r1_val, 0);
       SetS390OverflowCode(isOF);
       break;
     }
     case AGHI:
     case MGHI: {
       RIInstruction* riinst = reinterpret_cast<RIInstruction*>(instr);
-      int r1 = riinst->R1Value();
+      int32_t r1 = riinst->R1Value();
       int64_t i = static_cast<int64_t>(riinst->I2Value());
       int64_t r1_val = get_register(r1);
       bool isOF = false;
       switch (op) {
         case AGHI:
-          isOF = CheckOverflowForIntAdd(r1_val, i);
+          isOF = CheckOverflowForIntAdd(r1_val, i, int64_t);
           r1_val += i;
           break;
         case MGHI:
           isOF = CheckOverflowForMul(r1_val, i);
           r1_val *= i;
           break;  // no overflow indication is given
         default:
           break;
       }
       set_register(r1, r1_val);
@@ skipping 66 matching lines @@
       int x2 = rxinst->X2Value();
       int32_t r1_val = get_low_register<int32_t>(rxinst->R1Value());
       int64_t b2_val = (b2 == 0) ? 0 : get_register(b2);
       int64_t x2_val = (x2 == 0) ? 0 : get_register(x2);
       intptr_t d2_val = rxinst->D2Value();
       int32_t mem_val = ReadW(b2_val + x2_val + d2_val, instr);
       int32_t alu_out = 0;
       bool isOF = false;
       switch (op) {
         case A:
-          isOF = CheckOverflowForIntAdd(r1_val, mem_val);
+          isOF = CheckOverflowForIntAdd(r1_val, mem_val, int32_t);
           alu_out = r1_val + mem_val;
           SetS390ConditionCode<int32_t>(alu_out, 0);
           SetS390OverflowCode(isOF);
           break;
         case S:
-          isOF = CheckOverflowForIntSub(r1_val, mem_val);
+          isOF = CheckOverflowForIntSub(r1_val, mem_val, int32_t);
           alu_out = r1_val - mem_val;
           SetS390ConditionCode<int32_t>(alu_out, 0);
           SetS390OverflowCode(isOF);
           break;
         case M:
         case D:
           UNIMPLEMENTED();
           break;
         case O:
           alu_out = r1_val | mem_val;
@@ skipping 57 matching lines @@
     case SH:
     case MH: {
       RXInstruction* rxinst = reinterpret_cast<RXInstruction*>(instr);
       int b2 = rxinst->B2Value();
       int x2 = rxinst->X2Value();
       int32_t r1_val = get_low_register<int32_t>(rxinst->R1Value());
       int64_t b2_val = (b2 == 0) ? 0 : get_register(b2);
       int64_t x2_val = (x2 == 0) ? 0 : get_register(x2);
       intptr_t d2_val = rxinst->D2Value();
       intptr_t addr = b2_val + x2_val + d2_val;
-      int16_t mem_val = ReadH(addr, instr);
+      int32_t mem_val = static_cast<int32_t>(ReadH(addr, instr));
       int32_t alu_out = 0;
       bool isOF = false;
       if (AH == op) {
-        isOF = CheckOverflowForIntAdd(r1_val, mem_val);
+        isOF = CheckOverflowForIntAdd(r1_val, mem_val, int32_t);
         alu_out = r1_val + mem_val;
       } else if (SH == op) {
-        isOF = CheckOverflowForIntSub(r1_val, mem_val);
+        isOF = CheckOverflowForIntSub(r1_val, mem_val, int32_t);
         alu_out = r1_val - mem_val;
       } else if (MH == op) {
         alu_out = r1_val * mem_val;
       } else {
         UNREACHABLE();
       }
       set_low_register(r1, alu_out);
       if (MH != op) {  // MH does not change condition code
         SetS390ConditionCode<int32_t>(alu_out, 0);
         SetS390OverflowCode(isOF);
@@ skipping 1458 matching lines @@
     case AGHIK: {
       // Non-clobbering Add Halfword Immediate
       RIEInstruction* rieInst = reinterpret_cast<RIEInstruction*>(instr);
       int r1 = rieInst->R1Value();
       int r2 = rieInst->R2Value();
       bool isOF = false;
       if (AHIK == op) {
         // 32-bit Add
         int32_t r2_val = get_low_register<int32_t>(r2);
         int32_t imm = rieInst->I6Value();
-        isOF = CheckOverflowForIntAdd(r2_val, imm);
+        isOF = CheckOverflowForIntAdd(r2_val, imm, int32_t);
         set_low_register(r1, r2_val + imm);
         SetS390ConditionCode<int32_t>(r2_val + imm, 0);
       } else if (AGHIK == op) {
         // 64-bit Add
         int64_t r2_val = get_register(r2);
         int64_t imm = static_cast<int64_t>(rieInst->I6Value());
-        isOF = CheckOverflowForIntAdd(r2_val, imm);
+        isOF = CheckOverflowForIntAdd(r2_val, imm, int64_t);
         set_register(r1, r2_val + imm);
         SetS390ConditionCode<int64_t>(r2_val + imm, 0);
       }
       SetS390OverflowCode(isOF);
       break;
     }
     case ALFI:
     case SLFI: {
       RILInstruction* rilInstr = reinterpret_cast<RILInstruction*>(instr);
       int r1 = rilInstr->R1Value();
@@ skipping 22 matching lines @@
       int r1 = rxyInstr->R1Value();
       int x2 = rxyInstr->X2Value();
       int b2 = rxyInstr->B2Value();
       int d2 = rxyInstr->D2Value();
       int64_t x2_val = (x2 == 0) ? 0 : get_register(x2);
       int64_t b2_val = (b2 == 0) ? 0 : get_register(b2);
       int32_t alu_out = get_low_register<int32_t>(r1);
       int32_t mem_val = ReadW(b2_val + x2_val + d2, instr);
       bool isOF = false;
       if (op == AY) {
-        isOF = CheckOverflowForIntAdd(alu_out, mem_val);
+        isOF = CheckOverflowForIntAdd(alu_out, mem_val, int32_t);
         alu_out += mem_val;
         SetS390ConditionCode<int32_t>(alu_out, 0);
         SetS390OverflowCode(isOF);
       } else if (op == SY) {
-        isOF = CheckOverflowForIntSub(alu_out, mem_val);
+        isOF = CheckOverflowForIntSub(alu_out, mem_val, int32_t);
         alu_out -= mem_val;
         SetS390ConditionCode<int32_t>(alu_out, 0);
         SetS390OverflowCode(isOF);
       } else if (op == NY) {
         alu_out &= mem_val;
         SetS390BitWiseConditionCode<uint32_t>(alu_out);
       } else if (op == OY) {
         alu_out |= mem_val;
         SetS390BitWiseConditionCode<uint32_t>(alu_out);
       } else if (op == XY) {
         alu_out ^= mem_val;
         SetS390BitWiseConditionCode<uint32_t>(alu_out);
       } else if (op == CY) {
         SetS390ConditionCode<int32_t>(alu_out, mem_val);
       }
       if (op != CY) {
         set_low_register(r1, alu_out);
       }
       break;
     }
     case AHY:
     case SHY: {
       RXYInstruction* rxyInstr = reinterpret_cast<RXYInstruction*>(instr);
       int32_t r1_val = get_low_register<int32_t>(rxyInstr->R1Value());
       int b2 = rxyInstr->B2Value();
       int x2 = rxyInstr->X2Value();
       int64_t b2_val = (b2 == 0) ? 0 : get_register(b2);
       int64_t x2_val = (x2 == 0) ? 0 : get_register(x2);
       intptr_t d2_val = rxyInstr->D2Value();
-      int16_t mem_val = ReadH(b2_val + d2_val + x2_val, instr);
+      int32_t mem_val =
+          static_cast<int32_t>(ReadH(b2_val + d2_val + x2_val, instr));
       int32_t alu_out = 0;
       bool isOF = false;
       switch (op) {
         case AHY:
           alu_out = r1_val + mem_val;
-          isOF = CheckOverflowForIntAdd(r1_val, mem_val);
+          isOF = CheckOverflowForIntAdd(r1_val, mem_val, int32_t);
           break;
         case SHY:
           alu_out = r1_val - mem_val;
-          isOF = CheckOverflowForIntSub(r1_val, mem_val);
+          isOF = CheckOverflowForIntSub(r1_val, mem_val, int64_t);
           break;
         default:
           UNREACHABLE();
           break;
       }
       set_low_register(r1, alu_out);
       SetS390ConditionCode<int32_t>(alu_out, 0);
       SetS390OverflowCode(isOF);
       break;
     }
@@ skipping 82 matching lines @@
         SetS390ConditionCode<uint32_t>(alu_out, 0);
       } else if (op == CLY) {
         SetS390ConditionCode<uint32_t>(alu_out, mem_val);
       }
       break;
     }
     case AGFI:
     case AFI: {
       // Clobbering Add Word Immediate
       RILInstruction* rilInstr = reinterpret_cast<RILInstruction*>(instr);
-      int r1 = rilInstr->R1Value();
-      int i2 = rilInstr->I2Value();
+      int32_t r1 = rilInstr->R1Value();
       bool isOF = false;
       if (AFI == op) {
         // 32-bit Add (Register + 32-bit Immediate)
         int32_t r1_val = get_low_register<int32_t>(r1);
-        isOF = CheckOverflowForIntAdd(r1_val, i2);
+        int32_t i2 = rilInstr->I2Value();
+        isOF = CheckOverflowForIntAdd(r1_val, i2, int32_t);
         int32_t alu_out = r1_val + i2;
         set_low_register(r1, alu_out);
         SetS390ConditionCode<int32_t>(alu_out, 0);
       } else if (AGFI == op) {
         // 64-bit Add (Register + 32-bit Imm)
         int64_t r1_val = get_register(r1);
-        isOF = CheckOverflowForIntAdd(r1_val, i2);
+        int64_t i2 = static_cast<int64_t>(rilInstr->I2Value());
+        isOF = CheckOverflowForIntAdd(r1_val, i2, int64_t);
         int64_t alu_out = r1_val + i2;
         set_register(r1, alu_out);
         SetS390ConditionCode<int64_t>(alu_out, 0);
       }
       SetS390OverflowCode(isOF);
       break;
     }
     case ASI: {
-      int8_t i2 = static_cast<int8_t>(siyInstr->I2Value());
+      // TODO(bcleung): Change all fooInstr->I2Value() to template functions.
+      // The below static cast to 8 bit and then to 32 bit is necessary
+      // because siyInstr->I2Value() returns a uint8_t, which a direct
+      // cast to int32_t could incorrectly interpret.
+      int8_t i2_8bit = static_cast<int8_t>(siyInstr->I2Value());
+      int32_t i2 = static_cast<int32_t>(i2_8bit);
       int b1 = siyInstr->B1Value();
       intptr_t b1_val = (b1 == 0) ? 0 : get_register(b1);
 
       int d1_val = siyInstr->D1Value();
       intptr_t addr = b1_val + d1_val;
 
       int32_t mem_val = ReadW(addr, instr);
-      bool isOF = CheckOverflowForIntAdd(mem_val, i2);
+      bool isOF = CheckOverflowForIntAdd(mem_val, i2, int32_t);
       int32_t alu_out = mem_val + i2;
       SetS390ConditionCode<int32_t>(alu_out, 0);
       SetS390OverflowCode(isOF);
       WriteW(addr, alu_out, instr);
       break;
     }
     case AGSI: {
-      int8_t i2 = static_cast<int8_t>(siyInstr->I2Value());
+      // TODO(bcleung): Change all fooInstr->I2Value() to template functions.
+      // The below static cast to 8 bit and then to 32 bit is necessary
+      // because siyInstr->I2Value() returns a uint8_t, which a direct
+      // cast to int32_t could incorrectly interpret.
+      int8_t i2_8bit = static_cast<int8_t>(siyInstr->I2Value());
+      int64_t i2 = static_cast<int64_t>(i2_8bit);
       int b1 = siyInstr->B1Value();
       intptr_t b1_val = (b1 == 0) ? 0 : get_register(b1);
 
       int d1_val = siyInstr->D1Value();
       intptr_t addr = b1_val + d1_val;
 
       int64_t mem_val = ReadDW(addr);
-      int isOF = CheckOverflowForIntAdd(mem_val, i2);
+      int isOF = CheckOverflowForIntAdd(mem_val, i2, int64_t);
       int64_t alu_out = mem_val + i2;
       SetS390ConditionCode<uint64_t>(alu_out, 0);
       SetS390OverflowCode(isOF);
       WriteDW(addr, alu_out);
       break;
     }
     case AGF:
     case SGF:
     case ALG:
     case SLG: {
@@ skipping 428 matching lines @@
   uintptr_t address = *stack_slot;
   set_register(sp, current_sp + sizeof(uintptr_t));
   return address;
 }
 
 }  // namespace internal
 }  // namespace v8
 
 #endif  // USE_SIMULATOR
 #endif  // V8_TARGET_ARCH_S390