Version 5.0.71.21: Merge arm64 CacheLineSizes revert

src/base/cpu.cc

 // Copyright 2013 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/base/cpu.h"
 
 #if V8_LIBC_MSVCRT
 #include <intrin.h>  // __cpuid()
 #endif
 #if V8_OS_LINUX
@@ skipping 59 matching lines @@
                      "=d"(cpu_info[3])
                    : "a"(info_type), "c"(0));
 #endif  // defined(__i386__) && defined(__pic__)
 }
 
 #endif  // !V8_LIBC_MSVCRT
 
 #elif V8_HOST_ARCH_ARM || V8_HOST_ARCH_ARM64 \
     || V8_HOST_ARCH_MIPS || V8_HOST_ARCH_MIPS64
 
-#if V8_HOST_ARCH_ARM64
-class CacheLineSizes {
- public:
-  CacheLineSizes() {
-#ifdef USE_SIMULATOR
-    cache_type_register_ = 0;
-#else
-    // Copy the content of the cache type register to a core register.
-    __asm__ __volatile__("mrs %[ctr], ctr_el0"  // NOLINT
-                         : [ctr] "=r"(cache_type_register_));
-#endif
-  }
-
-  uint32_t icache_line_size() const { return ExtractCacheLineSize(0); }
-  uint32_t dcache_line_size() const { return ExtractCacheLineSize(16); }
-
- private:
-  uint32_t ExtractCacheLineSize(int cache_line_size_shift) const {
-    // The cache type register holds the size of cache lines in words as a
-    // power of two.
-    return 4 << ((cache_type_register_ >> cache_line_size_shift) & 0xf);
-  }
-
-  uint32_t cache_type_register_;
-};
-#endif  // V8_HOST_ARCH_ARM64
-
 #if V8_OS_LINUX
 
 #if V8_HOST_ARCH_ARM
 
 // See <uapi/asm/hwcap.h> kernel header.
 /*
  * HWCAP flags - for elf_hwcap (in kernel) and AT_HWCAP
  */
 #define HWCAP_SWP (1 << 0)
 #define HWCAP_HALF  (1 << 1)
@@ skipping 531 matching lines @@
   char* part = cpu_info.ExtractField("CPU part");
   if (part != NULL) {
     char* end;
     part_ = strtol(part, &end, 0);
     if (end == part) {
       part_ = 0;
     }
     delete[] part;
   }
 
-  CacheLineSizes sizes;
-  icache_line_size_ = sizes.icache_line_size();
-  dcache_line_size_ = sizes.dcache_line_size();
-
 #elif V8_HOST_ARCH_PPC
 
 #ifndef USE_SIMULATOR
 #if V8_OS_LINUX
   // Read processor info from /proc/self/auxv.
   char* auxv_cpu_type = NULL;
   FILE* fp = fopen("/proc/self/auxv", "r");
   if (fp != NULL) {
 #if V8_TARGET_ARCH_PPC64
     Elf64_auxv_t entry;
@@ skipping 54 matching lines @@
       part_ = PPC_POWER5;
       break;
   }
 #endif  // V8_OS_AIX
 #endif  // !USE_SIMULATOR
 #endif  // V8_HOST_ARCH_PPC
 }
 
 }  // namespace base
 }  // namespace v8