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Side by Side Diff: src/mips/macro-assembler-mips.h

Issue 1819383002: MIPS: [wasm] Lowering of Int64Shl, Int64Shr, Int64Sar, Int64Add and Int64Sub. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Enable all lowering tests Created 4 years, 8 months ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_MIPS_MACRO_ASSEMBLER_MIPS_H_ 5 #ifndef V8_MIPS_MACRO_ASSEMBLER_MIPS_H_
6 #define V8_MIPS_MACRO_ASSEMBLER_MIPS_H_ 6 #define V8_MIPS_MACRO_ASSEMBLER_MIPS_H_
7 7
8 #include "src/assembler.h" 8 #include "src/assembler.h"
9 #include "src/globals.h" 9 #include "src/globals.h"
10 #include "src/mips/assembler-mips.h" 10 #include "src/mips/assembler-mips.h"
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801 // register dst. 801 // register dst.
802 void StoreToSafepointRegisterSlot(Register src, Register dst); 802 void StoreToSafepointRegisterSlot(Register src, Register dst);
803 // Load the value of the src register from its safepoint stack slot 803 // Load the value of the src register from its safepoint stack slot
804 // into register dst. 804 // into register dst.
805 void LoadFromSafepointRegisterSlot(Register dst, Register src); 805 void LoadFromSafepointRegisterSlot(Register dst, Register src);
806 806
807 // MIPS32 R2 instruction macro. 807 // MIPS32 R2 instruction macro.
808 void Ins(Register rt, Register rs, uint16_t pos, uint16_t size); 808 void Ins(Register rt, Register rs, uint16_t pos, uint16_t size);
809 void Ext(Register rt, Register rs, uint16_t pos, uint16_t size); 809 void Ext(Register rt, Register rs, uint16_t pos, uint16_t size);
810 810
811 // Int64Lowering instructions
812 void AddPair(Register dst_low, Register dst_high, Register left_low,
813 Register left_high, Register right_low, Register right_high);
814
815 void SubPair(Register dst_low, Register dst_high, Register left_low,
816 Register left_high, Register right_low, Register right_high);
817
818 void ShlPair(Register dst_low, Register dst_high, Register src_low,
819 Register src_high, Register shift);
820
821 void ShlPair(Register dst_low, Register dst_high, Register src_low,
822 Register src_high, uint32_t shift);
823
824 void ShrPair(Register dst_low, Register dst_high, Register src_low,
825 Register src_high, Register shift);
826
827 void ShrPair(Register dst_low, Register dst_high, Register src_low,
828 Register src_high, uint32_t shift);
829
830 void SarPair(Register dst_low, Register dst_high, Register src_low,
831 Register src_high, Register shift);
832
833 void SarPair(Register dst_low, Register dst_high, Register src_low,
834 Register src_high, uint32_t shift);
835
811 // --------------------------------------------------------------------------- 836 // ---------------------------------------------------------------------------
812 // FPU macros. These do not handle special cases like NaN or +- inf. 837 // FPU macros. These do not handle special cases like NaN or +- inf.
813 838
814 // Convert unsigned word to double. 839 // Convert unsigned word to double.
815 void Cvt_d_uw(FPURegister fd, Register rs, FPURegister scratch); 840 void Cvt_d_uw(FPURegister fd, Register rs, FPURegister scratch);
816 841
817 // Convert single to unsigned word. 842 // Convert single to unsigned word.
818 void Trunc_uw_s(FPURegister fd, FPURegister fs, FPURegister scratch); 843 void Trunc_uw_s(FPURegister fd, FPURegister fs, FPURegister scratch);
819 void Trunc_uw_s(FPURegister fd, Register rs, FPURegister scratch); 844 void Trunc_uw_s(FPURegister fd, Register rs, FPURegister scratch);
820 845
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1842 #define __FILE_LINE__ __FILE__ ":" CODE_COVERAGE_TOSTRING(__LINE__) 1867 #define __FILE_LINE__ __FILE__ ":" CODE_COVERAGE_TOSTRING(__LINE__)
1843 #define ACCESS_MASM(masm) masm->stop(__FILE_LINE__); masm-> 1868 #define ACCESS_MASM(masm) masm->stop(__FILE_LINE__); masm->
1844 #else 1869 #else
1845 #define ACCESS_MASM(masm) masm-> 1870 #define ACCESS_MASM(masm) masm->
1846 #endif 1871 #endif
1847 1872
1848 } // namespace internal 1873 } // namespace internal
1849 } // namespace v8 1874 } // namespace v8
1850 1875
1851 #endif // V8_MIPS_MACRO_ASSEMBLER_MIPS_H_ 1876 #endif // V8_MIPS_MACRO_ASSEMBLER_MIPS_H_
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