A64: Move veneer emission checking in the Assembler.

src/a64/macro-assembler-a64.cc

 // Copyright 2013 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
 //       disclaimer in the documentation and/or other materials provided
@@ skipping 540 matching lines @@
     Strh(rt, addr);
   } else if (r.IsInteger32()) {
     Str(rt.W(), addr);
   } else {
     ASSERT(rt.Is64Bits());
     Str(rt, addr);
   }
 }
 
 
-bool MacroAssembler::ShouldEmitVeneer(int max_reachable_pc, int margin) {
-  // Account for the branch around the veneers and the guard.
-  int protection_offset = 2 * kInstructionSize;
-  return pc_offset() > max_reachable_pc - margin - protection_offset -
-    static_cast<int>(unresolved_branches_.size() * kMaxVeneerCodeSize);
-}
-
-
-void MacroAssembler::EmitVeneers(bool need_protection) {
-  RecordComment("[ Veneers");
-
-  Label end;
-  if (need_protection) {
-    B(&end);
-  }
-
-  EmitVeneersGuard();
-
-  {
-    InstructionAccurateScope scope(this);
-    Label size_check;
-
-    std::multimap<int, FarBranchInfo>::iterator it, it_to_delete;
-
-    it = unresolved_branches_.begin();
-    while (it != unresolved_branches_.end()) {
-      if (ShouldEmitVeneer(it->first)) {
-        Instruction* branch = InstructionAt(it->second.pc_offset_);
-        Label* label = it->second.label_;
-
-#ifdef DEBUG
-        __ bind(&size_check);
-#endif
-        // Patch the branch to point to the current position, and emit a branch
-        // to the label.
-        Instruction* veneer = reinterpret_cast<Instruction*>(pc_);
-        RemoveBranchFromLabelLinkChain(branch, label, veneer);
-        branch->SetImmPCOffsetTarget(veneer);
-        b(label);
-#ifdef DEBUG
-        ASSERT(SizeOfCodeGeneratedSince(&size_check) <=
-               static_cast<uint64_t>(kMaxVeneerCodeSize));
-        size_check.Unuse();
-#endif
-
-        it_to_delete = it++;
-        unresolved_branches_.erase(it_to_delete);
-      } else {
-        ++it;
-      }
-    }
-  }
-
-  Bind(&end);
-
-  RecordComment("]");
-}
-
-
-void MacroAssembler::EmitVeneersGuard() {
-  if (emit_debug_code()) {
-    Unreachable();
-  }
-}
-
-
-void MacroAssembler::CheckVeneers(bool need_protection) {
-  if (unresolved_branches_.empty()) {
-    return;
-  }
-
-  CHECK(pc_offset() < unresolved_branches_first_limit());
-  int margin = kVeneerDistanceMargin;
-  if (!need_protection) {
-    // Prefer emitting veneers protected by an existing instruction.
-    // The 4 divisor is a finger in the air guess. With a default margin of 2KB,
-    // that leaves 512B = 128 instructions of extra margin to avoid requiring a
-    // protective branch.
-    margin += margin / 4;
-  }
-  if (ShouldEmitVeneer(unresolved_branches_first_limit(), margin)) {
-    EmitVeneers(need_protection);
-  }
-}
-
-
 bool MacroAssembler::NeedExtraInstructionsOrRegisterBranch(
     Label *label, ImmBranchType b_type) {
   bool need_longer_range = false;
   // There are two situations in which we care about the offset being out of
   // range:
   //  - The label is bound but too far away.
   //  - The label is not bound but linked, and the previous branch
   //    instruction in the chain is too far away.
   if (label->is_bound() || label->is_linked()) {
     need_longer_range =
       !Instruction::IsValidImmPCOffset(b_type, label->pos() - pc_offset());
   }
   if (!need_longer_range && !label->is_bound()) {
     int max_reachable_pc = pc_offset() + Instruction::ImmBranchRange(b_type);
     unresolved_branches_.insert(
         std::pair<int, FarBranchInfo>(max_reachable_pc,
                                       FarBranchInfo(pc_offset(), label)));
+    // Also maintain the next pool check.
+    next_veneer_pool_check_ =
+      Min(next_veneer_pool_check_,
+          max_reachable_pc - kVeneerDistanceCheckMargin);
   }
   return need_longer_range;
 }
 
 
 void MacroAssembler::B(Label* label, BranchType type, Register reg, int bit) {
   ASSERT((reg.Is(NoReg) || type >= kBranchTypeFirstUsingReg) &&
          (bit == -1 || type >= kBranchTypeFirstUsingBit));
   if (kBranchTypeFirstCondition <= type && type <= kBranchTypeLastCondition) {
     B(static_cast<Condition>(type), label);
@@ skipping 15 matching lines @@
 void MacroAssembler::B(Label* label, Condition cond) {
   ASSERT(allow_macro_instructions_);
   ASSERT((cond != al) && (cond != nv));
 
   Label done;
   bool need_extra_instructions =
     NeedExtraInstructionsOrRegisterBranch(label, CondBranchType);
 
   if (need_extra_instructions) {
     b(&done, InvertCondition(cond));
-    b(label);
+    B(label);
   } else {
     b(label, cond);
   }
-  CheckVeneers(!need_extra_instructions);
   bind(&done);
 }
 
 
 void MacroAssembler::Tbnz(const Register& rt, unsigned bit_pos, Label* label) {
   ASSERT(allow_macro_instructions_);
 
   Label done;
   bool need_extra_instructions =
     NeedExtraInstructionsOrRegisterBranch(label, TestBranchType);
 
   if (need_extra_instructions) {
     tbz(rt, bit_pos, &done);
-    b(label);
+    B(label);
   } else {
     tbnz(rt, bit_pos, label);
   }
-  CheckVeneers(!need_extra_instructions);
   bind(&done);
 }
 
 
 void MacroAssembler::Tbz(const Register& rt, unsigned bit_pos, Label* label) {
   ASSERT(allow_macro_instructions_);
 
   Label done;
   bool need_extra_instructions =
     NeedExtraInstructionsOrRegisterBranch(label, TestBranchType);
 
   if (need_extra_instructions) {
     tbnz(rt, bit_pos, &done);
-    b(label);
+    B(label);
   } else {
     tbz(rt, bit_pos, label);
   }
-  CheckVeneers(!need_extra_instructions);
   bind(&done);
 }
 
 
 void MacroAssembler::Cbnz(const Register& rt, Label* label) {
   ASSERT(allow_macro_instructions_);
 
   Label done;
   bool need_extra_instructions =
     NeedExtraInstructionsOrRegisterBranch(label, CompareBranchType);
 
   if (need_extra_instructions) {
     cbz(rt, &done);
-    b(label);
+    B(label);
   } else {
     cbnz(rt, label);
   }
-  CheckVeneers(!need_extra_instructions);
   bind(&done);
 }
 
 
 void MacroAssembler::Cbz(const Register& rt, Label* label) {
   ASSERT(allow_macro_instructions_);
 
   Label done;
   bool need_extra_instructions =
     NeedExtraInstructionsOrRegisterBranch(label, CompareBranchType);
 
   if (need_extra_instructions) {
     cbnz(rt, &done);
-    b(label);
+    B(label);
   } else {
     cbz(rt, label);
   }
-  CheckVeneers(!need_extra_instructions);
   bind(&done);
 }
 
 
 // Pseudo-instructions.
 
 
 void MacroAssembler::Abs(const Register& rd, const Register& rm,
                          Label* is_not_representable,
                          Label* is_representable) {
@@ skipping 1216 matching lines @@
 
 
 void MacroAssembler::Jump(Handle<Code> code, RelocInfo::Mode rmode) {
   ASSERT(RelocInfo::IsCodeTarget(rmode));
   AllowDeferredHandleDereference embedding_raw_address;
   Jump(reinterpret_cast<intptr_t>(code.location()), rmode);
 }
 
 
 void MacroAssembler::Call(Register target) {
-  BlockConstPoolScope scope(this);
+  BlockPoolsScope scope(this);
 #ifdef DEBUG
   Label start_call;
   Bind(&start_call);
 #endif
 
   Blr(target);
 
 #ifdef DEBUG
   AssertSizeOfCodeGeneratedSince(&start_call, CallSize(target));
 #endif
 }
 
 
 void MacroAssembler::Call(Label* target) {
-  BlockConstPoolScope scope(this);
+  BlockPoolsScope scope(this);
 #ifdef DEBUG
   Label start_call;
   Bind(&start_call);
 #endif
 
   Bl(target);
 
 #ifdef DEBUG
   AssertSizeOfCodeGeneratedSince(&start_call, CallSize(target));
 #endif
 }
 
 
 // MacroAssembler::CallSize is sensitive to changes in this function, as it
 // requires to know how many instructions are used to branch to the target.
 void MacroAssembler::Call(Address target, RelocInfo::Mode rmode) {
-  BlockConstPoolScope scope(this);
+  BlockPoolsScope scope(this);
 #ifdef DEBUG
   Label start_call;
   Bind(&start_call);
 #endif
   // Statement positions are expected to be recorded when the target
   // address is loaded.
   positions_recorder()->WriteRecordedPositions();
 
   // Addresses always have 64 bits, so we shouldn't encounter NONE32.
   ASSERT(rmode != RelocInfo::NONE32);
@@ skipping 2617 matching lines @@
 
     // Call Printf directly to report the error.
     CallPrintf();
 
     // We need a way to stop execution on both the simulator and real hardware,
     // and Unreachable() is the best option.
     Unreachable();
 
     // Emit the message string directly in the instruction stream.
     {
-      BlockConstPoolScope scope(this);
+      BlockPoolsScope scope(this);
       Bind(&msg_address);
       EmitStringData(GetBailoutReason(reason));
     }
   }
 
   SetStackPointer(old_stack_pointer);
 }
 
 
 void MacroAssembler::LoadTransitionedArrayMapConditional(
@@ skipping 171 matching lines @@
   // Load the format string into x0, as per the procedure-call standard.
   //
   // To make the code as portable as possible, the format string is encoded
   // directly in the instruction stream. It might be cleaner to encode it in a
   // literal pool, but since Printf is usually used for debugging, it is
   // beneficial for it to be minimally dependent on other features.
   Label format_address;
   Adr(x0, &format_address);
 
   // Emit the format string directly in the instruction stream.
-  { BlockConstPoolScope scope(this);
+  { BlockPoolsScope scope(this);
     Label after_data;
     B(&after_data);
     Bind(&format_address);
     EmitStringData(format);
     Unreachable();
     Bind(&after_data);
   }
 
   // We don't pass any arguments on the stack, but we still need to align the C
   // stack pointer to a 16-byte boundary for PCS compliance.
@@ skipping 144 matching lines @@
 }
 #endif
 
 
 #undef __
 #define __ masm->
 
 
 void InlineSmiCheckInfo::Emit(MacroAssembler* masm, const Register& reg,
                               const Label* smi_check) {
-  Assembler::BlockConstPoolScope scope(masm);
+  Assembler::BlockPoolsScope scope(masm);
   if (reg.IsValid()) {
     ASSERT(smi_check->is_bound());
     ASSERT(reg.Is64Bits());
 
     // Encode the register (x0-x30) in the lowest 5 bits, then the offset to
     // 'check' in the other bits. The possible offset is limited in that we
     // use BitField to pack the data, and the underlying data type is a
     // uint32_t.
     uint32_t delta = __ InstructionsGeneratedSince(smi_check);
     __ InlineData(RegisterBits::encode(reg.code()) | DeltaBits::encode(delta));
@@ skipping 25 matching lines @@
   }
 }
 
 
 #undef __
 
 
 } }  // namespace v8::internal
 
 #endif  // V8_TARGET_ARCH_A64