| OLD | NEW |
| 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
| 2 // All Rights Reserved. | 2 // All Rights Reserved. |
| 3 // | 3 // |
| 4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
| 5 // modification, are permitted provided that the following conditions are | 5 // modification, are permitted provided that the following conditions are |
| 6 // met: | 6 // met: |
| 7 // | 7 // |
| 8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
| 9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
| 10 // | 10 // |
| (...skipping 263 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 274 inline explicit Immediate(Address x, RelocInfo::Mode rmode); | 274 inline explicit Immediate(Address x, RelocInfo::Mode rmode); |
| 275 | 275 |
| 276 static Immediate CodeRelativeOffset(Label* label) { | 276 static Immediate CodeRelativeOffset(Label* label) { |
| 277 return Immediate(label); | 277 return Immediate(label); |
| 278 } | 278 } |
| 279 | 279 |
| 280 bool is_zero() const { return x_ == 0 && RelocInfo::IsNone(rmode_); } | 280 bool is_zero() const { return x_ == 0 && RelocInfo::IsNone(rmode_); } |
| 281 bool is_int8() const { | 281 bool is_int8() const { |
| 282 return -128 <= x_ && x_ < 128 && RelocInfo::IsNone(rmode_); | 282 return -128 <= x_ && x_ < 128 && RelocInfo::IsNone(rmode_); |
| 283 } | 283 } |
| 284 bool is_uint8() const { |
| 285 return v8::internal::is_uint8(x_) && RelocInfo::IsNone(rmode_); |
| 286 } |
| 284 bool is_int16() const { | 287 bool is_int16() const { |
| 285 return -32768 <= x_ && x_ < 32768 && RelocInfo::IsNone(rmode_); | 288 return -32768 <= x_ && x_ < 32768 && RelocInfo::IsNone(rmode_); |
| 286 } | 289 } |
| 287 | 290 |
| 288 private: | 291 private: |
| 289 inline explicit Immediate(Label* value); | 292 inline explicit Immediate(Label* value); |
| 290 | 293 |
| 291 int x_; | 294 int x_; |
| 292 RelocInfo::Mode rmode_; | 295 RelocInfo::Mode rmode_; |
| 293 | 296 |
| (...skipping 366 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 660 void add(Register dst, const Immediate& imm) { add(Operand(dst), imm); } | 663 void add(Register dst, const Immediate& imm) { add(Operand(dst), imm); } |
| 661 void add(const Operand& dst, const Immediate& x); | 664 void add(const Operand& dst, const Immediate& x); |
| 662 | 665 |
| 663 void and_(Register dst, int32_t imm32); | 666 void and_(Register dst, int32_t imm32); |
| 664 void and_(Register dst, const Immediate& x); | 667 void and_(Register dst, const Immediate& x); |
| 665 void and_(Register dst, Register src) { and_(dst, Operand(src)); } | 668 void and_(Register dst, Register src) { and_(dst, Operand(src)); } |
| 666 void and_(Register dst, const Operand& src); | 669 void and_(Register dst, const Operand& src); |
| 667 void and_(const Operand& dst, Register src); | 670 void and_(const Operand& dst, Register src); |
| 668 void and_(const Operand& dst, const Immediate& x); | 671 void and_(const Operand& dst, const Immediate& x); |
| 669 | 672 |
| 670 void cmpb(Register reg, int8_t imm8) { cmpb(Operand(reg), imm8); } | 673 void cmpb(Register reg, Immediate imm8) { cmpb(Operand(reg), imm8); } |
| 671 void cmpb(const Operand& op, int8_t imm8); | 674 void cmpb(const Operand& op, Immediate imm8); |
| 672 void cmpb(Register reg, const Operand& op); | 675 void cmpb(Register reg, const Operand& op); |
| 673 void cmpb(const Operand& op, Register reg); | 676 void cmpb(const Operand& op, Register reg); |
| 677 void cmpb(Register dst, Register src) { cmpb(Operand(dst), src); } |
| 674 void cmpb_al(const Operand& op); | 678 void cmpb_al(const Operand& op); |
| 675 void cmpw_ax(const Operand& op); | 679 void cmpw_ax(const Operand& op); |
| 676 void cmpw(const Operand& op, Immediate imm16); | 680 void cmpw(const Operand& dst, Immediate src); |
| 681 void cmpw(Register dst, Immediate src) { cmpw(Operand(dst), src); } |
| 682 void cmpw(Register dst, const Operand& src); |
| 683 void cmpw(Register dst, Register src) { cmpw(Operand(dst), src); } |
| 684 void cmpw(const Operand& dst, Register src); |
| 677 void cmp(Register reg, int32_t imm32); | 685 void cmp(Register reg, int32_t imm32); |
| 678 void cmp(Register reg, Handle<Object> handle); | 686 void cmp(Register reg, Handle<Object> handle); |
| 679 void cmp(Register reg0, Register reg1) { cmp(reg0, Operand(reg1)); } | 687 void cmp(Register reg0, Register reg1) { cmp(reg0, Operand(reg1)); } |
| 680 void cmp(Register reg, const Operand& op); | 688 void cmp(Register reg, const Operand& op); |
| 681 void cmp(Register reg, const Immediate& imm) { cmp(Operand(reg), imm); } | 689 void cmp(Register reg, const Immediate& imm) { cmp(Operand(reg), imm); } |
| 682 void cmp(const Operand& op, Register reg); | 690 void cmp(const Operand& op, Register reg); |
| 683 void cmp(const Operand& op, const Immediate& imm); | 691 void cmp(const Operand& op, const Immediate& imm); |
| 684 void cmp(const Operand& op, Handle<Object> handle); | 692 void cmp(const Operand& op, Handle<Object> handle); |
| 685 | 693 |
| 686 void dec_b(Register dst); | 694 void dec_b(Register dst); |
| (...skipping 71 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 758 void sub(const Operand& dst, const Immediate& x); | 766 void sub(const Operand& dst, const Immediate& x); |
| 759 void sub(Register dst, Register src) { sub(dst, Operand(src)); } | 767 void sub(Register dst, Register src) { sub(dst, Operand(src)); } |
| 760 void sub(Register dst, const Operand& src); | 768 void sub(Register dst, const Operand& src); |
| 761 void sub(const Operand& dst, Register src); | 769 void sub(const Operand& dst, Register src); |
| 762 | 770 |
| 763 void test(Register reg, const Immediate& imm); | 771 void test(Register reg, const Immediate& imm); |
| 764 void test(Register reg0, Register reg1) { test(reg0, Operand(reg1)); } | 772 void test(Register reg0, Register reg1) { test(reg0, Operand(reg1)); } |
| 765 void test(Register reg, const Operand& op); | 773 void test(Register reg, const Operand& op); |
| 766 void test_b(Register reg, const Operand& op); | 774 void test_b(Register reg, const Operand& op); |
| 767 void test(const Operand& op, const Immediate& imm); | 775 void test(const Operand& op, const Immediate& imm); |
| 768 void test_b(Register reg, uint8_t imm8); | 776 void test_b(Register reg, Immediate imm8); |
| 769 void test_b(const Operand& op, uint8_t imm8); | 777 void test_b(const Operand& op, Immediate imm8); |
| 770 | 778 |
| 771 void xor_(Register dst, int32_t imm32); | 779 void xor_(Register dst, int32_t imm32); |
| 772 void xor_(Register dst, Register src) { xor_(dst, Operand(src)); } | 780 void xor_(Register dst, Register src) { xor_(dst, Operand(src)); } |
| 773 void xor_(Register dst, const Operand& src); | 781 void xor_(Register dst, const Operand& src); |
| 774 void xor_(const Operand& dst, Register src); | 782 void xor_(const Operand& dst, Register src); |
| 775 void xor_(Register dst, const Immediate& imm) { xor_(Operand(dst), imm); } | 783 void xor_(Register dst, const Immediate& imm) { xor_(Operand(dst), imm); } |
| 776 void xor_(const Operand& dst, const Immediate& x); | 784 void xor_(const Operand& dst, const Immediate& x); |
| 777 | 785 |
| 778 // Bit operations. | 786 // Bit operations. |
| 779 void bt(const Operand& dst, Register src); | 787 void bt(const Operand& dst, Register src); |
| (...skipping 697 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 1477 void GrowBuffer(); | 1485 void GrowBuffer(); |
| 1478 inline void emit(uint32_t x); | 1486 inline void emit(uint32_t x); |
| 1479 inline void emit(Handle<Object> handle); | 1487 inline void emit(Handle<Object> handle); |
| 1480 inline void emit(uint32_t x, | 1488 inline void emit(uint32_t x, |
| 1481 RelocInfo::Mode rmode, | 1489 RelocInfo::Mode rmode, |
| 1482 TypeFeedbackId id = TypeFeedbackId::None()); | 1490 TypeFeedbackId id = TypeFeedbackId::None()); |
| 1483 inline void emit(Handle<Code> code, | 1491 inline void emit(Handle<Code> code, |
| 1484 RelocInfo::Mode rmode, | 1492 RelocInfo::Mode rmode, |
| 1485 TypeFeedbackId id = TypeFeedbackId::None()); | 1493 TypeFeedbackId id = TypeFeedbackId::None()); |
| 1486 inline void emit(const Immediate& x); | 1494 inline void emit(const Immediate& x); |
| 1495 inline void emit_b(Immediate x); |
| 1487 inline void emit_w(const Immediate& x); | 1496 inline void emit_w(const Immediate& x); |
| 1488 inline void emit_q(uint64_t x); | 1497 inline void emit_q(uint64_t x); |
| 1489 | 1498 |
| 1490 // Emit the code-object-relative offset of the label's position | 1499 // Emit the code-object-relative offset of the label's position |
| 1491 inline void emit_code_relative_offset(Label* label); | 1500 inline void emit_code_relative_offset(Label* label); |
| 1492 | 1501 |
| 1493 // instruction generation | 1502 // instruction generation |
| 1494 void emit_arith_b(int op1, int op2, Register dst, int imm8); | 1503 void emit_arith_b(int op1, int op2, Register dst, int imm8); |
| 1495 | 1504 |
| 1496 // Emit a basic arithmetic instruction (i.e. first byte of the family is 0x81) | 1505 // Emit a basic arithmetic instruction (i.e. first byte of the family is 0x81) |
| (...skipping 76 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 1573 Assembler* assembler_; | 1582 Assembler* assembler_; |
| 1574 #ifdef DEBUG | 1583 #ifdef DEBUG |
| 1575 int space_before_; | 1584 int space_before_; |
| 1576 #endif | 1585 #endif |
| 1577 }; | 1586 }; |
| 1578 | 1587 |
| 1579 } // namespace internal | 1588 } // namespace internal |
| 1580 } // namespace v8 | 1589 } // namespace v8 |
| 1581 | 1590 |
| 1582 #endif // V8_IA32_ASSEMBLER_IA32_H_ | 1591 #endif // V8_IA32_ASSEMBLER_IA32_H_ |
| OLD | NEW |