libvpx: Pull from upstream

source/libvpx/vp9/common/arm/neon/vp9_idct32x32_add_neon.asm

 ;
 ;  Copyright (c) 2013 The WebM project authors. All Rights Reserved.
 ;
 ;  Use of this source code is governed by a BSD-style license
 ;  that can be found in the LICENSE file in the root of the source
 ;  tree. An additional intellectual property rights grant can be found
 ;  in the file PATENTS.  All contributing project authors may
 ;  be found in the AUTHORS file in the root of the source tree.
 ;
 
@@ skipping 54 matching lines @@
     vld1.s16        {q14}, [r0]
     add r0, #($second_offset - $first_offset)*8*2
     vld1.s16        {q13}, [r0]
     ; (used) two registers (q14, q13)
     MEND
     ; --------------------------------------------------------------------------
     ; Load from output (used as temporary storage)
     ;   reg1 = output[first_offset]
     ;   reg2 = output[second_offset]
     ;   for proper address calculation, the last offset used when manipulating
-    ;   output, wethere reading or storing) must be passed in. use 0 for first
+    ;   output, whether reading or storing) must be passed in. use 0 for first
     ;   use.
     MACRO
     LOAD_FROM_OUTPUT $prev_offset, $first_offset, $second_offset, $reg1, $reg2
     ; address calculation with proper stride and loading
     add r1, #($first_offset  - $prev_offset )*32*2
     vld1.s16        {$reg1}, [r1]
     add r1, #($second_offset - $first_offset)*32*2
     vld1.s16        {$reg2}, [r1]
     ; (used) two registers ($reg1, $reg2)
     MEND
     ; --------------------------------------------------------------------------
     ; Store into output (sometimes as as temporary storage)
     ;   output[first_offset] = reg1
     ;   output[second_offset] = reg2
     ;   for proper address calculation, the last offset used when manipulating
-    ;   output, wethere reading or storing) must be passed in. use 0 for first
+    ;   output, whether reading or storing) must be passed in. use 0 for first
     ;   use.
     MACRO
     STORE_IN_OUTPUT $prev_offset, $first_offset, $second_offset, $reg1, $reg2
     ; address calculation with proper stride and storing
     add r1, #($first_offset  - $prev_offset )*32*2
     vst1.16 {$reg1}, [r1]
     add r1, #($second_offset - $first_offset)*32*2
     vst1.16 {$reg2}, [r1]
     MEND
     ; --------------------------------------------------------------------------
@@ skipping 133 matching lines @@
     add r7, r7, r2, lsl #1
     MEND
     ; --------------------------------------------------------------------------
     ; Touches q8-q12, q15 (q13-q14 are preserved)
     ; valid output registers are anything but q8-q11
     MACRO
     DO_BUTTERFLY $regC, $regD, $regA, $regB, $first_constant, $second_constant, $reg1, $reg2, $reg3, $reg4
     ; TODO(cd): have special case to re-use constants when they are similar for
     ;           consecutive butterflies
     ; TODO(cd): have special case when both constants are the same, do the
-    ;           additions/substractions before the multiplies.
+    ;           additions/subtractions before the multiplies.
     ; generate the constants
     ;   generate scalar constants
     mov             r8,  #$first_constant  & 0xFF00
     mov             r12, #$second_constant & 0xFF00
     add             r8,  #$first_constant  & 0x00FF
     add             r12, #$second_constant & 0x00FF
     ;   generate vector constants
     vdup.16         d30, r8
     vdup.16         d31, r12
     ; (used) two for inputs (regA-regD), one for constants (q15)
     ; do some multiplications (ordered for maximum latency hiding)
     vmull.s16 q8,  $regC, d30
     vmull.s16 q10, $regA, d31
     vmull.s16 q9,  $regD, d30
     vmull.s16 q11, $regB, d31
     vmull.s16 q12, $regC, d31
     ; (used) five for intermediate (q8-q12), one for constants (q15)
-    ; do some addition/substractions (to get back two register)
+    ; do some addition/subtractions (to get back two register)
     vsub.s32  q8, q8, q10
     vsub.s32  q9, q9, q11
     ; do more multiplications (ordered for maximum latency hiding)
     vmull.s16 q10, $regD, d31
     vmull.s16 q11, $regA, d30
     vmull.s16 q15, $regB, d30
     ; (used) six for intermediate (q8-q12, q15)
-    ; do more addition/substractions
+    ; do more addition/subtractions
     vadd.s32  q11, q12, q11
     vadd.s32  q10, q10, q15
     ; (used) four for intermediate (q8-q11)
     ; dct_const_round_shift
     vqrshrn.s32 $reg1, q8,  #14
     vqrshrn.s32 $reg2, q9,  #14
     vqrshrn.s32 $reg3, q11, #14
     vqrshrn.s32 $reg4, q10, #14
     ; (used) two for results, well four d registers
     MEND
@@ skipping 1008 matching lines @@
     subs r4, r4, #1
     bne idct32_bands_loop
 
     ; stack operation
     add sp, sp, #512+2048+2048
     vpop {d8-d15}
     pop  {r4-r11}
     bx              lr
     ENDP  ; |vp9_idct32x32_1024_add_neon|
     END