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Issue 18130004: Split IdenticalWithNumberCheck in two versions: once called from unoptimized code the other called… (Closed) Base URL: http://dart.googlecode.com/svn/branches/bleeding_edge/dart/
Patch Set: Created 7 years, 5 months ago
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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #include "vm/globals.h" 5 #include "vm/globals.h"
6 #if defined(TARGET_ARCH_MIPS) 6 #if defined(TARGET_ARCH_MIPS)
7 7
8 #include "vm/assembler.h" 8 #include "vm/assembler.h"
9 #include "vm/code_generator.h" 9 #include "vm/code_generator.h"
10 #include "vm/compiler.h" 10 #include "vm/compiler.h"
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2217 2217
2218 2218
2219 DECLARE_LEAF_RUNTIME_ENTRY(intptr_t, 2219 DECLARE_LEAF_RUNTIME_ENTRY(intptr_t,
2220 BigintCompare, 2220 BigintCompare,
2221 RawBigint* left, 2221 RawBigint* left,
2222 RawBigint* right); 2222 RawBigint* right);
2223 2223
2224 2224
2225 // Does identical check (object references are equal or not equal) with special 2225 // Does identical check (object references are equal or not equal) with special
2226 // checks for boxed numbers. 2226 // checks for boxed numbers.
2227 // RA: return address. 2227 // Returns: CMPRES is zero if equal, non-zero otherwise.
2228 // SP + 4: left operand.
2229 // SP + 0: right operand.
2230 // Return: CMPRES is zero if equal, non-zero otherwise.
2231 // Note: A Mint cannot contain a value that would fit in Smi, a Bigint 2228 // Note: A Mint cannot contain a value that would fit in Smi, a Bigint
2232 // cannot contain a value that fits in Mint or Smi. 2229 // cannot contain a value that fits in Mint or Smi.
2233 void StubCode::GenerateIdenticalWithNumberCheckStub(Assembler* assembler) { 2230 void StubCode::GenerateIdenticalWithNumberCheckStub(Assembler* assembler,
2231 const Register left,
2232 const Register right,
2233 const Register temp1,
2234 const Register temp2) {
2234 __ TraceSimMsg("IdenticalWithNumberCheckStub"); 2235 __ TraceSimMsg("IdenticalWithNumberCheckStub");
2235 __ Comment("IdenticalWithNumberCheckStub"); 2236 __ Comment("IdenticalWithNumberCheckStub");
2236 const Register temp1 = T2;
2237 const Register temp2 = T3;
2238 const Register left = T1;
2239 const Register right = T0;
2240 // Preserve left, right.
2241 __ addiu(SP, SP, Immediate(-4 * kWordSize));
2242 __ sw(temp1, Address(SP, 3 * kWordSize));
2243 __ sw(temp2, Address(SP, 2 * kWordSize));
2244 __ sw(left, Address(SP, 1 * kWordSize));
2245 __ sw(right, Address(SP, 0 * kWordSize));
2246 // TOS + 3: left argument.
2247 // TOS + 2: right argument.
2248 // TOS + 1: saved left
2249 // TOS + 0: saved right
2250 __ lw(left, Address(SP, 5 * kWordSize));
2251 __ lw(right, Address(SP, 4 * kWordSize));
2252 Label reference_compare, done, check_mint, check_bigint; 2237 Label reference_compare, done, check_mint, check_bigint;
2253 // If any of the arguments is Smi do reference compare. 2238 // If any of the arguments is Smi do reference compare.
2254 __ andi(temp1, left, Immediate(kSmiTagMask)); 2239 __ andi(temp1, left, Immediate(kSmiTagMask));
2255 __ beq(temp1, ZR, &reference_compare); 2240 __ beq(temp1, ZR, &reference_compare);
2256 __ andi(temp1, right, Immediate(kSmiTagMask)); 2241 __ andi(temp1, right, Immediate(kSmiTagMask));
2257 __ beq(temp1, ZR, &reference_compare); 2242 __ beq(temp1, ZR, &reference_compare);
2258 2243
2259 // Value compare for two doubles. 2244 // Value compare for two doubles.
2260 __ LoadImmediate(temp1, kDoubleCid); 2245 __ LoadImmediate(temp1, kDoubleCid);
2261 __ LoadClassId(temp2, left); 2246 __ LoadClassId(temp2, left);
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2310 // Result in V0, 0 means equal. 2295 // Result in V0, 0 means equal.
2311 __ LeaveStubFrame(); 2296 __ LeaveStubFrame();
2312 __ b(&done); 2297 __ b(&done);
2313 __ delay_slot()->mov(CMPRES, V0); 2298 __ delay_slot()->mov(CMPRES, V0);
2314 2299
2315 __ Bind(&reference_compare); 2300 __ Bind(&reference_compare);
2316 __ subu(CMPRES, left, right); 2301 __ subu(CMPRES, left, right);
2317 __ Bind(&done); 2302 __ Bind(&done);
2318 // A branch or test after this comparison will check CMPRES == TMP1. 2303 // A branch or test after this comparison will check CMPRES == TMP1.
2319 __ mov(TMP1, ZR); 2304 __ mov(TMP1, ZR);
2305 }
2306
2307
2308 // Called only from unoptimized code. All relevant registers have been saved.
2309 // RA: return address.
2310 // SP + 4: left operand.
2311 // SP + 0: right operand.
2312 // Returns: CMPRES is zero if equal, non-zero otherwise.
2313 void StubCode::GenerateUnoptimizedIdenticalWithNumberCheckStub(
2314 Assembler* assembler) {
2315 const Register temp1 = T2;
2316 const Register temp2 = T3;
2317 const Register left = T1;
2318 const Register right = T0;
2319 // Preserve left, right.
2320 __ lw(left, Address(SP, 1 * kWordSize));
2321 __ lw(right, Address(SP, 0 * kWordSize));
2322 GenerateIdenticalWithNumberCheckStub(assembler, left, right, temp1, temp2);
2323 __ Ret();
2324 }
2325
2326
2327 // Called from otpimzied code only. Must preserve any registers that are
2328 // destroyed.
2329 // SP + 4: left operand.
2330 // SP + 0: right operand.
2331 // Returns: CMPRES is zero if equal, non-zero otherwise.
2332 void StubCode::GenerateOptimizedIdenticalWithNumberCheckStub(
2333 Assembler* assembler) {
2334 const Register temp1 = T2;
2335 const Register temp2 = T3;
2336 const Register left = T1;
2337 const Register right = T0;
2338 // Preserve left, right.
2339 __ addiu(SP, SP, Immediate(-4 * kWordSize));
2340 __ sw(temp1, Address(SP, 3 * kWordSize));
2341 __ sw(temp2, Address(SP, 2 * kWordSize));
2342 __ sw(left, Address(SP, 1 * kWordSize));
2343 __ sw(right, Address(SP, 0 * kWordSize));
2344 __ lw(left, Address(SP, 5 * kWordSize));
2345 __ lw(right, Address(SP, 4 * kWordSize));
2346 GenerateIdenticalWithNumberCheckStub(assembler, left, right, temp1, temp2);
2320 __ lw(right, Address(SP, 0 * kWordSize)); 2347 __ lw(right, Address(SP, 0 * kWordSize));
2321 __ lw(left, Address(SP, 1 * kWordSize)); 2348 __ lw(left, Address(SP, 1 * kWordSize));
2322 __ lw(temp2, Address(SP, 2 * kWordSize)); 2349 __ lw(temp2, Address(SP, 2 * kWordSize));
2323 __ lw(temp1, Address(SP, 3 * kWordSize)); 2350 __ lw(temp1, Address(SP, 3 * kWordSize));
2324 __ Ret(); 2351 __ Ret();
2325 __ delay_slot()->addiu(SP, SP, Immediate(4 * kWordSize)); 2352 __ delay_slot()->addiu(SP, SP, Immediate(4 * kWordSize));
2326 } 2353 }
2327 2354
2328 } // namespace dart 2355 } // namespace dart
2329 2356
2330 #endif // defined TARGET_ARCH_MIPS 2357 #endif // defined TARGET_ARCH_MIPS
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