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1 // Copyright (c) 1994-2006 Sun Microsystems Inc. | 1 // Copyright (c) 1994-2006 Sun Microsystems Inc. |
2 // All Rights Reserved. | 2 // All Rights Reserved. |
3 // | 3 // |
4 // Redistribution and use in source and binary forms, with or without | 4 // Redistribution and use in source and binary forms, with or without |
5 // modification, are permitted provided that the following conditions | 5 // modification, are permitted provided that the following conditions |
6 // are met: | 6 // are met: |
7 // | 7 // |
8 // - Redistributions of source code must retain the above copyright notice, | 8 // - Redistributions of source code must retain the above copyright notice, |
9 // this list of conditions and the following disclaimer. | 9 // this list of conditions and the following disclaimer. |
10 // | 10 // |
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801 // Decrement CTR; branch if CTR != 0 | 801 // Decrement CTR; branch if CTR != 0 |
802 void bdnz(Label* L, LKBit lk = LeaveLK) { | 802 void bdnz(Label* L, LKBit lk = LeaveLK) { |
803 bc(branch_offset(L), DCBNZ, 0, lk); | 803 bc(branch_offset(L), DCBNZ, 0, lk); |
804 } | 804 } |
805 | 805 |
806 // Data-processing instructions | 806 // Data-processing instructions |
807 | 807 |
808 void sub(Register dst, Register src1, Register src2, OEBit s = LeaveOE, | 808 void sub(Register dst, Register src1, Register src2, OEBit s = LeaveOE, |
809 RCBit r = LeaveRC); | 809 RCBit r = LeaveRC); |
810 | 810 |
| 811 void subc(Register dst, Register src1, Register src2, OEBit s = LeaveOE, |
| 812 RCBit r = LeaveRC); |
| 813 void sube(Register dst, Register src1, Register src2, OEBit s = LeaveOE, |
| 814 RCBit r = LeaveRC); |
| 815 |
811 void subfic(Register dst, Register src, const Operand& imm); | 816 void subfic(Register dst, Register src, const Operand& imm); |
812 | 817 |
813 void subfc(Register dst, Register src1, Register src2, OEBit s = LeaveOE, | |
814 RCBit r = LeaveRC); | |
815 | |
816 void add(Register dst, Register src1, Register src2, OEBit s = LeaveOE, | 818 void add(Register dst, Register src1, Register src2, OEBit s = LeaveOE, |
817 RCBit r = LeaveRC); | 819 RCBit r = LeaveRC); |
818 | 820 |
819 void addc(Register dst, Register src1, Register src2, OEBit o = LeaveOE, | 821 void addc(Register dst, Register src1, Register src2, OEBit o = LeaveOE, |
820 RCBit r = LeaveRC); | 822 RCBit r = LeaveRC); |
821 void adde(Register dst, Register src1, Register src2, OEBit o = LeaveOE, | 823 void adde(Register dst, Register src1, Register src2, OEBit o = LeaveOE, |
822 RCBit r = LeaveRC); | 824 RCBit r = LeaveRC); |
823 void addze(Register dst, Register src1, OEBit o = LeaveOE, RCBit r = LeaveRC); | 825 void addze(Register dst, Register src1, OEBit o = LeaveOE, RCBit r = LeaveRC); |
824 | 826 |
825 void mullw(Register dst, Register src1, Register src2, OEBit o = LeaveOE, | 827 void mullw(Register dst, Register src1, Register src2, OEBit o = LeaveOE, |
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1473 | 1475 |
1474 | 1476 |
1475 class EnsureSpace BASE_EMBEDDED { | 1477 class EnsureSpace BASE_EMBEDDED { |
1476 public: | 1478 public: |
1477 explicit EnsureSpace(Assembler* assembler) { assembler->CheckBuffer(); } | 1479 explicit EnsureSpace(Assembler* assembler) { assembler->CheckBuffer(); } |
1478 }; | 1480 }; |
1479 } // namespace internal | 1481 } // namespace internal |
1480 } // namespace v8 | 1482 } // namespace v8 |
1481 | 1483 |
1482 #endif // V8_PPC_ASSEMBLER_PPC_H_ | 1484 #endif // V8_PPC_ASSEMBLER_PPC_H_ |
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