Adds missing case in mips double comparison.

runtime/vm/flow_graph_compiler_mips.cc

Index: runtime/vm/flow_graph_compiler_mips.cc
===================================================================
--- runtime/vm/flow_graph_compiler_mips.cc	(revision 24535)
+++ runtime/vm/flow_graph_compiler_mips.cc	(working copy)
@@ -1613,6 +1613,7 @@
 
   switch (true_condition) {
     case EQ: assembler()->ceqd(left, right); break;
+    case NE: assembler()->ceqd(left, right); break;
     case LT: assembler()->coltd(left, right); break;
     case LE: assembler()->coled(left, right); break;
     case GT: assembler()->coltd(right, left); break;
@@ -1625,8 +1626,13 @@
   }
 
   assembler()->LoadImmediate(TMP, 1);
-  assembler()->movf(CMPRES, TMP);
-  assembler()->movt(CMPRES, ZR);
+  if (true_condition == NE) {
+    assembler()->movf(CMPRES, ZR);
+    assembler()->movt(CMPRES, TMP);
+  } else {
+    assembler()->movf(CMPRES, TMP);
+    assembler()->movt(CMPRES, ZR);
+  }
   assembler()->mov(TMP, ZR);
 
   // EmitBranchOnCondition expects ordering to be described by CMPRES, TMP1.
@@ -1646,6 +1652,7 @@
 
   switch (true_condition) {
     case EQ: assembler()->ceqd(left, right); break;
+    case NE: assembler()->ceqd(left, right); break;
     case LT: assembler()->coltd(left, right); break;
     case LE: assembler()->coled(left, right); break;
     case GT: assembler()->coltd(right, left); break;
@@ -1657,7 +1664,11 @@
     }
   }
 
-  assembler()->bc1f(&done);  // False is already in result.
+  if (true_condition == NE) {
+    assembler()->bc1t(&done);  // False is already in result.
+  } else {
+    assembler()->bc1f(&done);
+  }
   assembler()->LoadObject(result, Bool::True());
   assembler()->Bind(&done);
 }