[turbofan] Move frame elision logic to the end

[turbofan] Move frame elision logic to the end

We establish spilling blocks for ranges spilling only in deferred blocks
really late - just before optimization. This means frame elision logic
should happen after all dust has settled - even after optimization, since
we may lose spills after that (this is not currently leveraged).

Also enabled the elision algo for all functions, but forcing the first frame
to construct a frame for non-code stub cases.  This is preparing for a
subsequent change where we guide frame construction/destruction
solely based on the info produced by the register allocation pipeline.

BUG=

Committed: https://crrev.com/32a2ab0c724673961aa145ab63c79a29e6d28fa8
Cr-Commit-Position: refs/heads/master@{#35016}

[Mircea Trofin, 2016-03-18 17:33:47]

Description was changed from

==========
[turbofan] Move frame elision logic to the end


BUG=
==========

to

==========
[turbofan] Move frame elision logic to the end

We establish spilling blocks for ranges spilling only in deferred blocks
really late - just before optimization. This means frame elision logic
should happen after all dust has settled - even after optimization, since
we may lose spills after that (this is not currently leveraged).

Also enabled the elision algo for all functions. This is preparing for a
subsequent change where we guide frame construction/destruction
solely based on the info produced by the register allocation pipeline.


BUG=
==========

[Mircea Trofin, 2016-03-18 17:33:47]

mtrofin@chromium.org changed reviewers:
+ danno@chromium.org

[Mircea Trofin, 2016-03-18 17:39:27]

Description was changed from

==========
[turbofan] Move frame elision logic to the end

We establish spilling blocks for ranges spilling only in deferred blocks
really late - just before optimization. This means frame elision logic
should happen after all dust has settled - even after optimization, since
we may lose spills after that (this is not currently leveraged).

Also enabled the elision algo for all functions. This is preparing for a
subsequent change where we guide frame construction/destruction
solely based on the info produced by the register allocation pipeline.


BUG=
==========

to

==========
[turbofan] Move frame elision logic to the end

We establish spilling blocks for ranges spilling only in deferred blocks
really late - just before optimization. This means frame elision logic
should happen after all dust has settled - even after optimization, since
we may lose spills after that (this is not currently leveraged).

Also enabled the elision algo for all functions, but forcing the first frame 
to construct a frame for non-code stub cases.  This is preparing for a
subsequent change where we guide frame construction/destruction
solely based on the info produced by the register allocation pipeline.


BUG=
==========

[Mircea Trofin, 2016-03-18 17:39:37]

Patchset #1 (id:1) has been deleted

[danno, 2016-03-18 18:13:00]

https://codereview.chromium.org/1810333003/diff/20001/src/compiler/frame-elid...
File src/compiler/frame-elider.cc (right):

https://codereview.chromium.org/1810333003/diff/20001/src/compiler/frame-elid...
src/compiler/frame-elider.cc:16: if (descriptor != nullptr &&
descriptor->RequiresFrameAsIncoming()) {
Passing in the CallDescriptor here seems weird. I liked the old way better. Can
you not just mark the first block externally in the pipeline?

[Mircea Trofin, 2016-03-18 18:22:19]

Patchset #2 (id:40001) has been deleted

[Mircea Trofin, 2016-03-18 18:22:31]

https://codereview.chromium.org/1810333003/diff/20001/src/compiler/frame-elid...
File src/compiler/frame-elider.cc (right):

https://codereview.chromium.org/1810333003/diff/20001/src/compiler/frame-elid...
src/compiler/frame-elider.cc:16: if (descriptor != nullptr &&
descriptor->RequiresFrameAsIncoming()) {
On 2016/03/18 18:13:00, danno wrote:
> Passing in the CallDescriptor here seems weird. I liked the old way better.
Can
> you not just mark the first block externally in the pipeline?

Done.

[danno, 2016-03-22 09:27:20]

https://codereview.chromium.org/1810333003/diff/60001/src/compiler/pipeline.cc
File src/compiler/pipeline.cc (right):

https://codereview.chromium.org/1810333003/diff/60001/src/compiler/pipeline.c...
src/compiler/pipeline.cc:1498:
data_->sequence()->instruction_blocks()[0]->mark_needs_frame();
I think this extra marking makes more sense in InitializeInstructionSequence.

[Mircea Trofin, 2016-03-22 15:28:36]

On 2016/03/22 09:27:20, danno wrote:
> https://codereview.chromium.org/1810333003/diff/60001/src/compiler/pipeline.cc
> File src/compiler/pipeline.cc (right):
> 
>
https://codereview.chromium.org/1810333003/diff/60001/src/compiler/pipeline.c...
> src/compiler/pipeline.cc:1498:
> data_->sequence()->instruction_blocks()[0]->mark_needs_frame();
> I think this extra marking makes more sense in InitializeInstructionSequence.

I'd prefer leaving it in the register allocation pipeline, see how we needed to
move
validation farther from schedule construction here:
https://codereview.chromium.org/1811213003/

[Mircea Trofin, 2016-03-22 17:28:23]

https://codereview.chromium.org/1810333003/diff/60001/src/compiler/pipeline.cc
File src/compiler/pipeline.cc (right):

https://codereview.chromium.org/1810333003/diff/60001/src/compiler/pipeline.c...
src/compiler/pipeline.cc:1498:
data_->sequence()->instruction_blocks()[0]->mark_needs_frame();
On 2016/03/22 09:27:20, danno wrote:
> I think this extra marking makes more sense in InitializeInstructionSequence. 

Done.

[danno, 2016-03-22 17:43:45]

danno@chromium.org changed reviewers:
+ jarin@chromium.org

[danno, 2016-03-22 17:43:45]

lgtm. Adding a compiler OWNER for a real lgtm.

[Mircea Trofin, 2016-03-23 05:55:26]

mtrofin@chromium.org changed reviewers:
+ bmeurer@chromium.org

[Benedikt Meurer, 2016-03-23 06:06:03]

lgtm

[Mircea Trofin, 2016-03-23 07:55:01]

The CQ bit was checked by mtrofin@chromium.org

[commit-bot: I haz the power, 2016-03-23 07:55:07]

CQ is trying da patch. Follow status at
 https://chromium-cq-status.appspot.com/patch-status/1810333003/80001
View timeline at
 https://chromium-cq-status.appspot.com/patch-timeline/1810333003/80001

[commit-bot: I haz the power, 2016-03-23 08:16:40]

Description was changed from

==========
[turbofan] Move frame elision logic to the end

We establish spilling blocks for ranges spilling only in deferred blocks
really late - just before optimization. This means frame elision logic
should happen after all dust has settled - even after optimization, since
we may lose spills after that (this is not currently leveraged).

Also enabled the elision algo for all functions, but forcing the first frame 
to construct a frame for non-code stub cases.  This is preparing for a
subsequent change where we guide frame construction/destruction
solely based on the info produced by the register allocation pipeline.


BUG=
==========

to

==========
[turbofan] Move frame elision logic to the end

We establish spilling blocks for ranges spilling only in deferred blocks
really late - just before optimization. This means frame elision logic
should happen after all dust has settled - even after optimization, since
we may lose spills after that (this is not currently leveraged).

Also enabled the elision algo for all functions, but forcing the first frame 
to construct a frame for non-code stub cases.  This is preparing for a
subsequent change where we guide frame construction/destruction
solely based on the info produced by the register allocation pipeline.


BUG=
==========

[commit-bot: I haz the power, 2016-03-23 08:16:41]

Committed patchset #3 (id:80001)

[commit-bot: I haz the power, 2016-03-23 08:37:07]

Description was changed from

==========
[turbofan] Move frame elision logic to the end

We establish spilling blocks for ranges spilling only in deferred blocks
really late - just before optimization. This means frame elision logic
should happen after all dust has settled - even after optimization, since
we may lose spills after that (this is not currently leveraged).

Also enabled the elision algo for all functions, but forcing the first frame 
to construct a frame for non-code stub cases.  This is preparing for a
subsequent change where we guide frame construction/destruction
solely based on the info produced by the register allocation pipeline.


BUG=
==========

to

==========
[turbofan] Move frame elision logic to the end

We establish spilling blocks for ranges spilling only in deferred blocks
really late - just before optimization. This means frame elision logic
should happen after all dust has settled - even after optimization, since
we may lose spills after that (this is not currently leveraged).

Also enabled the elision algo for all functions, but forcing the first frame
to construct a frame for non-code stub cases.  This is preparing for a
subsequent change where we guide frame construction/destruction
solely based on the info produced by the register allocation pipeline.

BUG=

Committed: https://crrev.com/32a2ab0c724673961aa145ab63c79a29e6d28fa8
Cr-Commit-Position: refs/heads/master@{#35016}
==========

[commit-bot: I haz the power, 2016-03-23 08:37:08]

Patchset 3 (id:??) landed as
https://crrev.com/32a2ab0c724673961aa145ab63c79a29e6d28fa8
Cr-Commit-Position: refs/heads/master@{#35016}