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1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #include <stdarg.h> | 5 #include <stdarg.h> |
6 #include <stdlib.h> | 6 #include <stdlib.h> |
7 #include <cmath> | 7 #include <cmath> |
8 | 8 |
9 #if V8_TARGET_ARCH_PPC | 9 #if V8_TARGET_ARCH_PPC |
10 | 10 |
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1726 bool Simulator::ExecuteExt2_10bit(Instruction* instr) { | 1726 bool Simulator::ExecuteExt2_10bit(Instruction* instr) { |
1727 bool found = true; | 1727 bool found = true; |
1728 | 1728 |
1729 int opcode = instr->Bits(10, 1) << 1; | 1729 int opcode = instr->Bits(10, 1) << 1; |
1730 switch (opcode) { | 1730 switch (opcode) { |
1731 case SRWX: { | 1731 case SRWX: { |
1732 int rs = instr->RSValue(); | 1732 int rs = instr->RSValue(); |
1733 int ra = instr->RAValue(); | 1733 int ra = instr->RAValue(); |
1734 int rb = instr->RBValue(); | 1734 int rb = instr->RBValue(); |
1735 uint32_t rs_val = get_register(rs); | 1735 uint32_t rs_val = get_register(rs); |
1736 uintptr_t rb_val = get_register(rb); | 1736 uintptr_t rb_val = get_register(rb) & 0x3f; |
1737 intptr_t result = rs_val >> (rb_val & 0x3f); | 1737 intptr_t result = (rb_val > 31) ? 0 : rs_val >> rb_val; |
1738 set_register(ra, result); | 1738 set_register(ra, result); |
1739 if (instr->Bit(0)) { // RC bit set | 1739 if (instr->Bit(0)) { // RC bit set |
1740 SetCR0(result); | 1740 SetCR0(result); |
1741 } | 1741 } |
1742 break; | 1742 break; |
1743 } | 1743 } |
1744 #if V8_TARGET_ARCH_PPC64 | 1744 #if V8_TARGET_ARCH_PPC64 |
1745 case SRDX: { | 1745 case SRDX: { |
1746 int rs = instr->RSValue(); | 1746 int rs = instr->RSValue(); |
1747 int ra = instr->RAValue(); | 1747 int ra = instr->RAValue(); |
1748 int rb = instr->RBValue(); | 1748 int rb = instr->RBValue(); |
1749 uintptr_t rs_val = get_register(rs); | 1749 uintptr_t rs_val = get_register(rs); |
1750 uintptr_t rb_val = get_register(rb); | 1750 uintptr_t rb_val = get_register(rb) & 0x7f; |
1751 intptr_t result = rs_val >> (rb_val & 0x7f); | 1751 intptr_t result = (rb_val > 63) ? 0 : rs_val >> rb_val; |
1752 set_register(ra, result); | 1752 set_register(ra, result); |
1753 if (instr->Bit(0)) { // RC bit set | 1753 if (instr->Bit(0)) { // RC bit set |
1754 SetCR0(result); | 1754 SetCR0(result); |
1755 } | 1755 } |
1756 break; | 1756 break; |
1757 } | 1757 } |
1758 #endif | 1758 #endif |
1759 case SRAW: { | 1759 case SRAW: { |
1760 int rs = instr->RSValue(); | 1760 int rs = instr->RSValue(); |
1761 int ra = instr->RAValue(); | 1761 int ra = instr->RAValue(); |
1762 int rb = instr->RBValue(); | 1762 int rb = instr->RBValue(); |
1763 int32_t rs_val = get_register(rs); | 1763 int32_t rs_val = get_register(rs); |
1764 intptr_t rb_val = get_register(rb); | 1764 intptr_t rb_val = get_register(rb) & 0x3f; |
1765 intptr_t result = rs_val >> (rb_val & 0x3f); | 1765 intptr_t result = (rb_val > 31) ? rs_val >> 31 : rs_val >> rb_val; |
1766 set_register(ra, result); | 1766 set_register(ra, result); |
1767 if (instr->Bit(0)) { // RC bit set | 1767 if (instr->Bit(0)) { // RC bit set |
1768 SetCR0(result); | 1768 SetCR0(result); |
1769 } | 1769 } |
1770 break; | 1770 break; |
1771 } | 1771 } |
1772 #if V8_TARGET_ARCH_PPC64 | 1772 #if V8_TARGET_ARCH_PPC64 |
1773 case SRAD: { | 1773 case SRAD: { |
1774 int rs = instr->RSValue(); | 1774 int rs = instr->RSValue(); |
1775 int ra = instr->RAValue(); | 1775 int ra = instr->RAValue(); |
1776 int rb = instr->RBValue(); | 1776 int rb = instr->RBValue(); |
1777 intptr_t rs_val = get_register(rs); | 1777 intptr_t rs_val = get_register(rs); |
1778 intptr_t rb_val = get_register(rb); | 1778 intptr_t rb_val = get_register(rb) & 0x7f; |
1779 intptr_t result = rs_val >> (rb_val & 0x7f); | 1779 intptr_t result = (rb_val > 63) ? rs_val >> 63 : rs_val >> rb_val; |
1780 set_register(ra, result); | 1780 set_register(ra, result); |
1781 if (instr->Bit(0)) { // RC bit set | 1781 if (instr->Bit(0)) { // RC bit set |
1782 SetCR0(result); | 1782 SetCR0(result); |
1783 } | 1783 } |
1784 break; | 1784 break; |
1785 } | 1785 } |
1786 #endif | 1786 #endif |
1787 case SRAWIX: { | 1787 case SRAWIX: { |
1788 int ra = instr->RAValue(); | 1788 int ra = instr->RAValue(); |
1789 int rs = instr->RSValue(); | 1789 int rs = instr->RSValue(); |
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2146 bool setSO = (special_reg_xer_ & 0x80000000); | 2146 bool setSO = (special_reg_xer_ & 0x80000000); |
2147 SetCR0(alu_out, setSO); | 2147 SetCR0(alu_out, setSO); |
2148 } | 2148 } |
2149 break; | 2149 break; |
2150 } | 2150 } |
2151 case SLWX: { | 2151 case SLWX: { |
2152 int rs = instr->RSValue(); | 2152 int rs = instr->RSValue(); |
2153 int ra = instr->RAValue(); | 2153 int ra = instr->RAValue(); |
2154 int rb = instr->RBValue(); | 2154 int rb = instr->RBValue(); |
2155 uint32_t rs_val = get_register(rs); | 2155 uint32_t rs_val = get_register(rs); |
2156 uintptr_t rb_val = get_register(rb); | 2156 uintptr_t rb_val = get_register(rb) & 0x3f; |
2157 uint32_t result = rs_val << (rb_val & 0x3f); | 2157 uint32_t result = (rb_val > 31) ? 0 : rs_val << rb_val; |
2158 set_register(ra, result); | 2158 set_register(ra, result); |
2159 if (instr->Bit(0)) { // RC bit set | 2159 if (instr->Bit(0)) { // RC bit set |
2160 SetCR0(result); | 2160 SetCR0(result); |
2161 } | 2161 } |
2162 break; | 2162 break; |
2163 } | 2163 } |
2164 #if V8_TARGET_ARCH_PPC64 | 2164 #if V8_TARGET_ARCH_PPC64 |
2165 case SLDX: { | 2165 case SLDX: { |
2166 int rs = instr->RSValue(); | 2166 int rs = instr->RSValue(); |
2167 int ra = instr->RAValue(); | 2167 int ra = instr->RAValue(); |
2168 int rb = instr->RBValue(); | 2168 int rb = instr->RBValue(); |
2169 uintptr_t rs_val = get_register(rs); | 2169 uintptr_t rs_val = get_register(rs); |
2170 uintptr_t rb_val = get_register(rb); | 2170 uintptr_t rb_val = get_register(rb) & 0x7f; |
2171 uintptr_t result = rs_val << (rb_val & 0x7f); | 2171 uintptr_t result = (rb_val > 63) ? 0 : rs_val << rb_val; |
2172 set_register(ra, result); | 2172 set_register(ra, result); |
2173 if (instr->Bit(0)) { // RC bit set | 2173 if (instr->Bit(0)) { // RC bit set |
2174 SetCR0(result); | 2174 SetCR0(result); |
2175 } | 2175 } |
2176 break; | 2176 break; |
2177 } | 2177 } |
2178 case MFVSRD: { | 2178 case MFVSRD: { |
2179 DCHECK(!instr->Bit(0)); | 2179 DCHECK(!instr->Bit(0)); |
2180 int frt = instr->RTValue(); | 2180 int frt = instr->RTValue(); |
2181 int ra = instr->RAValue(); | 2181 int ra = instr->RAValue(); |
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4129 uintptr_t* stack_slot = reinterpret_cast<uintptr_t*>(current_sp); | 4129 uintptr_t* stack_slot = reinterpret_cast<uintptr_t*>(current_sp); |
4130 uintptr_t address = *stack_slot; | 4130 uintptr_t address = *stack_slot; |
4131 set_register(sp, current_sp + sizeof(uintptr_t)); | 4131 set_register(sp, current_sp + sizeof(uintptr_t)); |
4132 return address; | 4132 return address; |
4133 } | 4133 } |
4134 } // namespace internal | 4134 } // namespace internal |
4135 } // namespace v8 | 4135 } // namespace v8 |
4136 | 4136 |
4137 #endif // USE_SIMULATOR | 4137 #endif // USE_SIMULATOR |
4138 #endif // V8_TARGET_ARCH_PPC | 4138 #endif // V8_TARGET_ARCH_PPC |
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