[wasm] Int64Lowering of Int64Mul on ia32 and arm.

src/compiler/arm/code-generator-arm.cc

Index: src/compiler/arm/code-generator-arm.cc
diff --git a/src/compiler/arm/code-generator-arm.cc b/src/compiler/arm/code-generator-arm.cc
index 474e41dc99c07d6e488bc3edff25a573b56176fe..398b7247c94dee0d2cbca2c3949725cbc897a31a 100644
--- a/src/compiler/arm/code-generator-arm.cc
+++ b/src/compiler/arm/code-generator-arm.cc
@@ -809,6 +809,18 @@ void CodeGenerator::AssembleArchInstruction(Instruction* instr) {
              Operand(i.InputRegister(3)));
       DCHECK_EQ(LeaveCC, i.OutputSBit());
       break;
+    case kArmMulPair:
+      // i.InputRegister(0) ... left low word.
+      // i.InputRegister(1) ... left high word.
+      // i.InputRegister(2) ... right low word.
+      // i.InputRegister(3) ... right high word.
+      __ mul(i.TempRegister(0), i.InputRegister(0), i.InputRegister(3));
+      __ mul(i.TempRegister(1), i.InputRegister(2), i.InputRegister(1));
+      __ add(i.TempRegister(0), i.TempRegister(0), i.TempRegister(1));
+      __ umull(i.OutputRegister(0), i.OutputRegister(1), i.InputRegister(0),
+               i.InputRegister(2));
+      __ add(i.OutputRegister(1), i.OutputRegister(1), i.TempRegister(0));

[martyn.capewell, 2016/03/17 18:20:29]

I think if you use multiply-accumulates here, you won't need temp registers:
  __ mul(i.OutputRegister(1), i.InputRegister(0), i.InputRegister(3));
  __ mla(i.OutputRegister(1), i.InputRegister(2), i.InputRegister(1),
i.OutputRegister(1));
  __ mov(i.OutputRegister(0), Operand(0));
  __ umlal(i.OutputRegister(0), i.OutputRegister(1), i.InputRegister(0),
i.InputRegister(2));

[martyn.capewell, 2016/03/18 11:42:49]

A bit more thought gives:
  __ umull(i.OutputRegister(0), i.OutputRegister(1), i.InputRegister(0),
i.InputRegister(2));
  __ mla(i.OutputRegister(1), i.InputRegister(0), i.InputRegister(3),
i.OutputRegister(1));
  __ mla(i.OutputRegister(1), i.InputRegister(2), i.InputRegister(1),
i.OutputRegister(1));

[ahaas, 2016/03/29 11:11:50]

Done. It was necessary for this change to use a unique register for input 3.

+      break;
     case kArmLslPair:
       if (instr->InputAt(2)->IsImmediate()) {
         __ LslPair(i.OutputRegister(0), i.OutputRegister(1), i.InputRegister(0),