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Side by Side Diff: src/compiler/arm/instruction-codes-arm.h

Issue 1807273002: [wasm] Int64Lowering of Int64Mul on ia32 and arm. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@wasm-phi
Patch Set: Rebase Created 4 years, 8 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_ 5 #ifndef V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_
6 #define V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_ 6 #define V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_
7 7
8 namespace v8 { 8 namespace v8 {
9 namespace internal { 9 namespace internal {
10 namespace compiler { 10 namespace compiler {
(...skipping 30 matching lines...) Expand all
41 V(ArmSxth) \ 41 V(ArmSxth) \
42 V(ArmSxtab) \ 42 V(ArmSxtab) \
43 V(ArmSxtah) \ 43 V(ArmSxtah) \
44 V(ArmUxtb) \ 44 V(ArmUxtb) \
45 V(ArmUxth) \ 45 V(ArmUxth) \
46 V(ArmUxtab) \ 46 V(ArmUxtab) \
47 V(ArmRbit) \ 47 V(ArmRbit) \
48 V(ArmUxtah) \ 48 V(ArmUxtah) \
49 V(ArmAddPair) \ 49 V(ArmAddPair) \
50 V(ArmSubPair) \ 50 V(ArmSubPair) \
51 V(ArmMulPair) \
51 V(ArmLslPair) \ 52 V(ArmLslPair) \
52 V(ArmLsrPair) \ 53 V(ArmLsrPair) \
53 V(ArmAsrPair) \ 54 V(ArmAsrPair) \
54 V(ArmVcmpF32) \ 55 V(ArmVcmpF32) \
55 V(ArmVaddF32) \ 56 V(ArmVaddF32) \
56 V(ArmVsubF32) \ 57 V(ArmVsubF32) \
57 V(ArmVmulF32) \ 58 V(ArmVmulF32) \
58 V(ArmVmlaF32) \ 59 V(ArmVmlaF32) \
59 V(ArmVmlsF32) \ 60 V(ArmVmlsF32) \
60 V(ArmVdivF32) \ 61 V(ArmVdivF32) \
(...skipping 66 matching lines...) Expand 10 before | Expand all | Expand 10 after
127 V(Operand2_R_ASR_R) /* %r0 ASR %r1 */ \ 128 V(Operand2_R_ASR_R) /* %r0 ASR %r1 */ \
128 V(Operand2_R_LSL_R) /* %r0 LSL %r1 */ \ 129 V(Operand2_R_LSL_R) /* %r0 LSL %r1 */ \
129 V(Operand2_R_LSR_R) /* %r0 LSR %r1 */ \ 130 V(Operand2_R_LSR_R) /* %r0 LSR %r1 */ \
130 V(Operand2_R_ROR_R) /* %r0 ROR %r1 */ 131 V(Operand2_R_ROR_R) /* %r0 ROR %r1 */
131 132
132 } // namespace compiler 133 } // namespace compiler
133 } // namespace internal 134 } // namespace internal
134 } // namespace v8 135 } // namespace v8
135 136
136 #endif // V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_ 137 #endif // V8_COMPILER_ARM_INSTRUCTION_CODES_ARM_H_
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